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UCC5350-Q1

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Automotive ±5A single-channel isolated gate driver with Miller clamp or split outputs for SiC/IGBT

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UCC5350-Q1

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Detalles del producto

Number of channels 1 Isolation rating Basic, Reinforced Withstand isolation voltage (VISO) (Vrms) 3000, 5000 Working isolation voltage (VIOWM) (Vrms) 990, 2121 Transient isolation voltage (VIOTM) (VPK) 4242, 7000 TI functional safety category Functional Safety-Capable Power switch IGBT, MOSFET, SiCFET Peak output current (A) 10 Features Active miller clamp, Split output Output VCC/VDD (max) (V) 33 Output VCC/VDD (min) (V) 9.5 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 15 Propagation delay time (µs) 0.065 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Automotive, Catalog Bootstrap supply voltage (max) (V) 990 Rise time (ns) 10 Fall time (ns) 10 Undervoltage lockout (typ) (V) 8, 12
Number of channels 1 Isolation rating Basic, Reinforced Withstand isolation voltage (VISO) (Vrms) 3000, 5000 Working isolation voltage (VIOWM) (Vrms) 990, 2121 Transient isolation voltage (VIOTM) (VPK) 4242, 7000 TI functional safety category Functional Safety-Capable Power switch IGBT, MOSFET, SiCFET Peak output current (A) 10 Features Active miller clamp, Split output Output VCC/VDD (max) (V) 33 Output VCC/VDD (min) (V) 9.5 Input supply voltage (min) (V) 3 Input supply voltage (max) (V) 15 Propagation delay time (µs) 0.065 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Automotive, Catalog Bootstrap supply voltage (max) (V) 990 Rise time (ns) 10 Fall time (ns) 10 Undervoltage lockout (typ) (V) 8, 12
SOIC (D) 8 29.4 mm² 4.9 x 6 SOIC (DWV) 8 67.275 mm² 5.85 x 11.5
  • ±5A minimum peak current drive strength
  • ±10A typical peak current drive strength
  • 3V to 15V input supply voltage
  • Up to 33V driver supply voltage
    • 8V and 12V UVLO options
  • 100V/ns minimum CMTI
  • Negative 5V handling capability on input pins
  • 100ns (maximum) propagation delay and <25ns part-to-part skew
  • 8-pin DWV (8.5mm creepage) and D (4mm creepage) packages
  • Isolation barrier life > 40 Years
  • Safety-related certifications:
    • 5000VRMS DWV and 3000VRMS D isolation rating for 1 minute per UL 1577
  • CMOS inputs
  • Operating junction temperature: –40°C to +150°C
  • ±5A minimum peak current drive strength
  • ±10A typical peak current drive strength
  • 3V to 15V input supply voltage
  • Up to 33V driver supply voltage
    • 8V and 12V UVLO options
  • 100V/ns minimum CMTI
  • Negative 5V handling capability on input pins
  • 100ns (maximum) propagation delay and <25ns part-to-part skew
  • 8-pin DWV (8.5mm creepage) and D (4mm creepage) packages
  • Isolation barrier life > 40 Years
  • Safety-related certifications:
    • 5000VRMS DWV and 3000VRMS D isolation rating for 1 minute per UL 1577
  • CMOS inputs
  • Operating junction temperature: –40°C to +150°C

The UCC5350-Q1 is a single-channel, isolated gate driver with 5A source and 5A sink minimum peak current designed to drive MOSFETs, IGBTs, and SiC MOSFETs. The UCC5350-Q1 has the option for Miller clamp or Split Outputs. The CLAMP pin is used to connect the transistor gate to an internal FET besides the output to prevent false turn-on caused by Miller current. The split outputs option allows separate control of the rise and fall times of the gate voltage with OUTH and OUTL pins.

The UCC5350-Q1 is available in a 4mm SOIC-8 (D) or 8.5mm wide body SOIC-8 (DWV) package and can support isolation voltage up to 3kVRMS and 5kVRMS, respectively. The input side is isolated from the output side with SiO2 capacitive isolation technology with longer than 40 years isolation barrier lifetime. The UCC5350-Q1 is a good fit for driving IGBTs or MOSFETs in applications such as high-voltage traction inverters and on-board chargers.

Compared to an optocoupler, the UCC5350-Q1 device has lower part-to-part skew, lower propagation delay, higher operating temperature, and higher CMTI.

The UCC5350-Q1 is a single-channel, isolated gate driver with 5A source and 5A sink minimum peak current designed to drive MOSFETs, IGBTs, and SiC MOSFETs. The UCC5350-Q1 has the option for Miller clamp or Split Outputs. The CLAMP pin is used to connect the transistor gate to an internal FET besides the output to prevent false turn-on caused by Miller current. The split outputs option allows separate control of the rise and fall times of the gate voltage with OUTH and OUTL pins.

The UCC5350-Q1 is available in a 4mm SOIC-8 (D) or 8.5mm wide body SOIC-8 (DWV) package and can support isolation voltage up to 3kVRMS and 5kVRMS, respectively. The input side is isolated from the output side with SiO2 capacitive isolation technology with longer than 40 years isolation barrier lifetime. The UCC5350-Q1 is a good fit for driving IGBTs or MOSFETs in applications such as high-voltage traction inverters and on-board chargers.

Compared to an optocoupler, the UCC5350-Q1 device has lower part-to-part skew, lower propagation delay, higher operating temperature, and higher CMTI.
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Documentación técnica

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* Data sheet UCC5350-Q1 Single-Channel Isolated Gate Driver datasheet (Rev. F) 18 jul 2024
Application brief Does My Design Need a Miller Clamp? PDF | HTML 11 dic 2024
Functional safety information UCC5390-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA PDF | HTML 16 mar 2022
Technical article Increasing power density with an integrated GaN solution PDF | HTML 14 mar 2022
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 dic 2021

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

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UCC5320SCEVM is an Evaluation Module used to evaluate UCC53xx family of devices and it provides user with flexiblity of configuring  driver to Split output, miller clamp or UVLO based on the device used . The EVM features enough test points & jumper options for one to evaluate the device (...)
Guía del usuario: PDF
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Placa de evaluación

UCC5390ECDWVEVM — Módulo de evaluación UCC5390ECDWV de controlador de puerta aislada monocanal (10 A y 10 A) y 5 kVrms

UCC5390ECDWVEVM is designed for evaluating the UCC53xxDWV family, which is a 5.0-kVRMS Isolated Single-Channel Gate Driver with 10-A source and 10-A sink peak current capability. This EVM could be served to evaluate the driver IC against its datsheet. The EVM can also be used as Driver IC (...)
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Placa de evaluación

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The UCC5390SCDEVM-010 is a complete single channel isolated gate drive board including reconfigurable bias supply providing wide range of drive voltages. The EVM is based on a 17-A split output basic insulation UCC5390SCD Driver in SOIC-8 package. The design also includes SN6505B based bias supply (...)
Guía del usuario: PDF
No disponible en TI.com
Modelo de simulación

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SLLM368A.ZIP (54 KB) - PSpice Model
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Modelo de simulación

UCC5350MCD Unencrypted PSpice Transient Model (Rev. A)

SLLM367A.ZIP (3 KB) - PSpice Model
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Modelo de simulación

UCC5350SBD PSpice Transient Model

SLLM379.ZIP (53 KB) - PSpice Model
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Modelo de simulación

UCC5350SBD Unencrypted PSpice Transient Model

SLLM378.ZIP (3 KB) - PSpice Model
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Herramienta de cálculo

SLURAY7 — UCC53x0 Gate Resistor and Thermal Calculator Tool

Productos y hardware compatibles

Productos y hardware compatibles

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Drivers de compuerta aislados
UCC5310 — Controlador de puerta aislada monocanal de 3 kVrms/5 kVrms y 2 A/1 A con pinza Miller, UVLO de 12 V UCC5320 — Controlador de puerta aislada monocanal de 3 k/5 kVrms y 2 A/2 A con UVLO referenciado en GND o sali UCC5350 — Controlador de puerta aislada monocanal de 3 kVrms y 5 A/5 A con pinza Miller o salida dividida y UV UCC5350-Q1 — Automotive ±5A single-channel isolated gate driver with Miller clamp or split outputs for SiC/IGBT UCC5390 — Controlador de puerta aislada monocanal de 3 kVrms/5 kVrms y ±10 A con UVLO referenciado en GND o sa UCC5390-Q1 — Controlador de puerta aislado de un solo canal de 17 A 5 kv RMS de calidad automotriz
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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SOIC (D) 8 Ultra Librarian
SOIC (DWV) 8 Ultra Librarian
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Pedidos y calidad

Información incluida:
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  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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  • Lugar de fabricación
  • Lugar de ensamblaje

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