The DS90UB927Q-Q1 serializer, in conjunction with a DS90UB928Q-Q1 or DS90UB926Q-Q1
deserializer, provides a complete digital interface for concurrent transmission of high-speed
video, audio, and control data for automotive display and image sensing applications.
The chipset is ideally suited for automotive video display systens with HD formats and
automotive vision systems with megapixel resolutions. The DS90UB927Q-Q1 incorporates an embedded
bidirectional control channel and low latency GPIO controls. This device translates a FPD-Link
video interface into a single-pair high-speed serialized interface. The FPD-Link III serial bus
scheme supports full duplex, high speed forward channel data transmission and low-speed back
channel communication over a single differential link. Consolidation of audio, video, and control
data over a single differential pair reduces the interconnect size and weight, while also
eliminating skew issues and simplifying system design.
The DS90UB927Q-Q1 serializer embeds the clock and level shifts the signals to high-speed
differential signaling. Up to 24 RGB data bits are serialized along with three video control
signals, and up to four I2S data inputs.
The FPD-Link data interface allows for easy interfacing with data sources while also
minimizing EMI and bus width. EMI on the high-speed FPD-Link III bus is minimized using low voltage
differential signaling, data scrambling and randomization, and DC-balancing.
The DS90UB927Q-Q1 serializer, in conjunction with a DS90UB928Q-Q1 or DS90UB926Q-Q1
deserializer, provides a complete digital interface for concurrent transmission of high-speed
video, audio, and control data for automotive display and image sensing applications.
The chipset is ideally suited for automotive video display systens with HD formats and
automotive vision systems with megapixel resolutions. The DS90UB927Q-Q1 incorporates an embedded
bidirectional control channel and low latency GPIO controls. This device translates a FPD-Link
video interface into a single-pair high-speed serialized interface. The FPD-Link III serial bus
scheme supports full duplex, high speed forward channel data transmission and low-speed back
channel communication over a single differential link. Consolidation of audio, video, and control
data over a single differential pair reduces the interconnect size and weight, while also
eliminating skew issues and simplifying system design.
The DS90UB927Q-Q1 serializer embeds the clock and level shifts the signals to high-speed
differential signaling. Up to 24 RGB data bits are serialized along with three video control
signals, and up to four I2S data inputs.
The FPD-Link data interface allows for easy interfacing with data sources while also
minimizing EMI and bus width. EMI on the high-speed FPD-Link III bus is minimized using low voltage
differential signaling, data scrambling and randomization, and DC-balancing.