Inicio Interfaz Circuitos integrados LVDS, M-LVDS y PECL

DS10BR150

ACTIVO

Repetidor/búfer LVDS de 1.0 Gbps

Detalles del producto

Function Buffer Protocols CML, LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 1000 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Buffer Protocols CML, LVDS, LVPECL Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 1000 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
WSON (NGQ) 8 9 mm² 3 x 3
  • DC - 1.0 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • On-chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

  • DC - 1.0 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • On-chip 100Ω Input and Output Termination Minimizes Insertion and Return Losses, Reduces Component Count and Minimizes Board Space
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm 8-WSON Space Saving Package

All trademarks are the property of their respective owners.

The DS10BR150 is a single channel 1.0 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count and further minimize board space.

The DS10BR150 is a single channel 1.0 Gbps LVDS buffer optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires a minimal space on the board while the flow-through pinout allows easy board layout. The differential inputs and outputs are internally terminated with a 100Ω resistor to lower device input and output return losses, reduce component count and further minimize board space.

Descargar Ver vídeo con transcripción Video

Documentación técnica

star =Principal documentación para este producto seleccionada por TI
No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 2
Tipo Título Fecha
* Data sheet DS10BR150 1.0 Gbps LVDS Buffer / Repeater datasheet (Rev. D) 12 abr 2013
User guide 1.06 Gbps LVDS Buffer Repeater (DS10BR150) Evaluation Kit 25 ene 2012

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

DS10BR150EVK — Kit de evaluación de repetidor/búfer LVDS (DS10BR150) de 1.06 Gbps

The DS10BR150EVK is an evaluation kit designed for demonstrating performance of the 1.06 Gbps LVDS Buffer / Repeater (DS10BR150). The purpose of this document is to: familiarize you with the DS10BR150EVK, suggest the test setup procedures and instrumentation, and guide you through some typical (...)

Guía del usuario: PDF
Modelo de simulación

DS10BR150 IBIS Model

SNLM089.ZIP (10 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
WSON (NGQ) 8 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

Videos