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The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.
The DS90C032 accepts low voltage differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.
The DS90C032 provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.
The DS90C032 and companion line driver (DS90C031) provide a new alternative to high power pseudo-ECL devices for high speed point-to-point interface applications.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | DS90C032QML LVDS Quad CMOS Differential Line Receiver datasheet (Rev. D) | 12 abr 2013 | |
| * | SMD | DS90C032QML SMD 5962-95834 | 21 jun 2016 | |
| * | Radiation & reliability report | DS90C032xLQMLV SEE Report | 09 may 2012 | |
| * | Radiation & reliability report | DS90C032xLQMLV TID Report | 09 may 2012 | |
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 03 ago 2018 | ||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 16 may 2018 | ||
| More literature | Die D/S DS90C032 MDR Lvds Quad Cmos Differential Line Receiver | 07 sep 2012 | ||
| Application note | AN-1110 LVDS Quad Dynamic I CC vs Frequency | 15 may 2004 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| LCCC (NAJ) | 20 | Ultra Librarian |
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