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DS90CR485

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Serializador Channel Link de 48 bits y 133 MHz

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DS90CR485

ACTIVO
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Detalles del producto

Protocols Catalog Rating Catalog Operating temperature range (°C) -10 to 70
Protocols Catalog Rating Catalog Operating temperature range (°C) -10 to 70
QFP (NEZ) 100 256 mm² 16 x 16
  • Up to 6.384-Gbps Throughput
  • 66-MHz to 133-MHz Input Clock Support
  • Reduces Cable and Connector Size and Cost
  • Pre‐Emphasis Reduces Cable Loading Effects
  • DC Balance Reduces ISI Distortion
  • 24-Bit Double Edge Inputs
  • 3-V Tolerant LVCMOS/LVTTL Inputs
  • Low Power, 2.5-V Supply
  • Flow-Through Pinout
  • 100-Pin TQFP Package
  • Conforms With TIA/EIA‐644-A LVDS Standard
  • Up to 6.384-Gbps Throughput
  • 66-MHz to 133-MHz Input Clock Support
  • Reduces Cable and Connector Size and Cost
  • Pre‐Emphasis Reduces Cable Loading Effects
  • DC Balance Reduces ISI Distortion
  • 24-Bit Double Edge Inputs
  • 3-V Tolerant LVCMOS/LVTTL Inputs
  • Low Power, 2.5-V Supply
  • Flow-Through Pinout
  • 100-Pin TQFP Package
  • Conforms With TIA/EIA‐644-A LVDS Standard

The DS90CR485 device serializes the 24 LVCMOS/LVTTL double-edge inputs (48 bits data latched in per clock cycle) onto eight Low Voltage Differential Signaling (LVDS) streams. A phase-locked transmit clock is also in parallel with the data streams over a 9th LVDS link. The reduction of the wide TTL bus to a few LVDS lines reduces cable and connector size and cost. The double-edge input strobes data on both the rising and falling edges of the clock. This minimizes the pin count required and simplifies PCB routing between the host chip and the serializer.

This chip can help resolve EMI and interconnect size problems for high throughput point-to-point applications.

The DS90CR485 is compatible with the DS90CR486 Channel-Link receiver. The device is also backward-compatible with other Channel-Link receivers such as the DS90CR482 and DS90CR484.

The DS90CR485 device serializes the 24 LVCMOS/LVTTL double-edge inputs (48 bits data latched in per clock cycle) onto eight Low Voltage Differential Signaling (LVDS) streams. A phase-locked transmit clock is also in parallel with the data streams over a 9th LVDS link. The reduction of the wide TTL bus to a few LVDS lines reduces cable and connector size and cost. The double-edge input strobes data on both the rising and falling edges of the clock. This minimizes the pin count required and simplifies PCB routing between the host chip and the serializer.

This chip can help resolve EMI and interconnect size problems for high throughput point-to-point applications.

The DS90CR485 is compatible with the DS90CR486 Channel-Link receiver. The device is also backward-compatible with other Channel-Link receivers such as the DS90CR482 and DS90CR484.
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Documentación técnica

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* Data sheet DS90CR485 133-MHz, 48-Bit Channel Link Serializer (6.384 Gbps) datasheet (Rev. E) 10 sep 2019
Application note High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs 09 nov 2018
EVM User's guide 48-bit Channel Link Serializer Deserializer Evaluation Board 133MHz 26 ene 2012
Design guide Channel Link I Design Guide 29 mar 2007
Application note Multi-Drop Channel-Link Operation 04 oct 2004
White paper The Many Flavors of LVDS 01 feb 2002
Application note CHANNEL LINK Moving and Shaping Information In Point-To-Point Applications 05 oct 1998

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

DS90CR485 IBIS Model

SNLM043.ZIP (7 KB) - IBIS Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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QFP (NEZ) 100 Ultra Librarian
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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Soporte y capacitación

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