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The DS90LV001 LVDS-LVDS Buffer takes an LVDS input signal and provides an LVDS output signal. In many large systems, signals are distributed across backplanes, and one of the limiting factors for system speed is the "stub length" or the distance between the transmission line and the unterminated receivers on individual cards. Although it is generally recognized that this distance should be as short as possible to maximize system performance, real-world packaging concerns often make it difficult to make the stubs as short as the designer would like.
The DS90LV001, available in the WSON package, will allow the receiver to be placed very close to the main transmission line, thus improving system performance.
A wide input dynamic range will allow the DS90LV001 to receive differential signals from LVPECL as well as LVDS sources. This will allow the device to also fill the role of an LVPECL-LVDS translator.
An output enable pin is provided, which allows the user to place the LVDS output in TRI-STATE.
The DS90LV001 is offered in two package options, an 8 pin WSON and SOIC.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | DS90LV001 800 Mbps LVDS Buffer datasheet (Rev. E) | 22 abr 2013 | |
| Application brief | How to Use a 3.3-V LVDS Buffer as a Low-Voltage LVDS Driver | 09 ene 2019 | ||
| EVM User's guide | 3.3V LVDS-LVDS Buffer Evaluation Board User Guide | 27 ene 2012 | ||
| Application note | Signaling Rate vs. Distance for Differential Buffers | 26 ene 2010 | ||
| White paper | Making the Most of Your LVDS - 5 Tips for Buffering Signal Integrity Headaches | 01 ago 2001 | ||
| Application note | An Overview of LVDS Technology | 05 oct 1998 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
| WSON (NGK) | 8 | Ultra Librarian |
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