All trademarks are the property of their respective owners.
The DS92LV18 Serializer/Deserializer (SERDES) pair transparently translates a 18–bit parallel bus into a BLVDS serial stream with embedded clock information. This single serial stream simplifies transferring a 18-bit, or less, bus over PCB traces and cables by eliminating the skew problems between parallel data and clock paths. It saves system cost by narrowing data paths that in turn reduce PCB layers, cable width, and connector size and pins.
This SERDES pair includes built-in system and device test capability. The line loopback feature enables the user to check the integrity of the serial data transmission paths of the transmitter and receiver while deserializing the serial data to parallel data at the receiver outputs. The local loopback feature enables the user to check the integrity of the transceiver from the local parallel-bus side.
The DS92LV18 incorporates modified BLVDS signaling on the high-speed I/O. BLVDS provides a low power and low noise environment for reliably transferring data over a serial transmission path. The equal and opposite currents through the differential data path control EMI by coupling the resulting fringing fields together.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | DS92LV18 18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz datasheet (Rev. E) | 18 abr 2013 | |
| Application note | DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E) | 29 abr 2013 | ||
| Application note | External Serial Interface Reduces Simultaneous Switching Output Noise in FPGAs (Rev. A) | 26 abr 2013 | ||
| User guide | 18-Bit SerDes Evaluation Kit User Manual | 25 ene 2012 | ||
| Design guide | 18-bit SerDes Design Guide (DS92LV18, SCAN921821) | 29 mar 2007 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
The LVDS-18B-EVK evaluation kit (EVK) is a complete kit to evaluate our 18-bit SerDes devices (DS92LV18 and SCAN921821) with low-cost twisted pair cables and other 100-Ω differential cables.
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| LQFP (PN) | 80 | Ultra Librarian |
Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.
El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.
Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI.