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Controladores de compuertas
Drivers de compuerta aislados

ISO5852S-Q1

ACTIVO

Controlador automotriz de puerta aislada monocanal de 5.7 kVrms, 2.5 A/5 A con salida dividida y pro

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UCC21750-Q1 ACTIVO Controlador de puerta aislada monocanal de ±10 A y 5.7 kVrms con DESATURACIÓN y pinza interna para I Newer generation, integrated Analog-to-PWM sensor

ISO5852S-Q1

ACTIVO
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Detalles del producto

Number of channels 1 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 5 Features Active miller clamp, Fault reporting, Power good, Short circuit protection, Soft turn-off, Soft turnoff, Split output Output VCC/VDD (max) (V) 30 Output VCC/VDD (min) (V) 15 Input supply voltage (min) (V) 2.25 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.076 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 18 Fall time (ns) 20 Undervoltage lockout (typ) (V) 12
Number of channels 1 Isolation rating Reinforced Withstand isolation voltage (VISO) (Vrms) 5700 Working isolation voltage (VIOWM) (Vrms) 2121 Transient isolation voltage (VIOTM) (VPK) 8000 Power switch IGBT, MOSFET, SiCFET Peak output current (A) 5 Features Active miller clamp, Fault reporting, Power good, Short circuit protection, Soft turn-off, Soft turnoff, Split output Output VCC/VDD (max) (V) 30 Output VCC/VDD (min) (V) 15 Input supply voltage (min) (V) 2.25 Input supply voltage (max) (V) 5.5 Propagation delay time (µs) 0.076 Input threshold CMOS Operating temperature range (°C) -40 to 125 Rating Automotive Bootstrap supply voltage (max) (V) 2121 Rise time (ns) 18 Fall time (ns) 20 Undervoltage lockout (typ) (V) 12
SOIC (DW) 16 106.09 mm² 10.3 x 10.3
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM Classification Level 3A
    • Device CDM Classification Level C6
  • 100-kV/μs Minimum Common-Mode Transient Immunity (CMTI) at VCM = 1500 V
  • Split Outputs to Provide 2.5-A Peak Source and
    5-A Peak Sink Currents
  • Short Propagation Delay: 76 ns (Typ),
    110 ns (Max)
  • 2-A Active Miller Clamp
  • Output Short-Circuit Clamp
  • Soft Turn-Off (STO) during Short Circuit
  • Fault Alarm upon Desaturation Detection is Signaled on FLT and Reset Through RST
  • Input and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin Indication
  • Active Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs
  • 2.25-V to 5.5-V Input Supply Voltage
  • 15-V to 30-V Output Driver Supply Voltage
  • CMOS Compatible Inputs
  • Rejects Input Pulses and Noise Transients Shorter Than 20 ns
  • Isolation Surge Withstand Voltage 12800-VPK
  • Safety-Related Certifications:
    • 8000-VPK VIOTM and 2121-VPK VIORM Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5700-VRMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950–1 and IEC 60601–1 End Equipment Standards
    • TUV Certification per EN 61010-1 and EN 60950-1
    • GB4943.1-2011 CQC Certification
    • All Certifications Complete per UL, VDE, CQC, TUV and Planned for CSA

All trademarks are the property of their respective owners.

  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM Classification Level 3A
    • Device CDM Classification Level C6
  • 100-kV/μs Minimum Common-Mode Transient Immunity (CMTI) at VCM = 1500 V
  • Split Outputs to Provide 2.5-A Peak Source and
    5-A Peak Sink Currents
  • Short Propagation Delay: 76 ns (Typ),
    110 ns (Max)
  • 2-A Active Miller Clamp
  • Output Short-Circuit Clamp
  • Soft Turn-Off (STO) during Short Circuit
  • Fault Alarm upon Desaturation Detection is Signaled on FLT and Reset Through RST
  • Input and Output Undervoltage Lockout (UVLO) with Ready (RDY) Pin Indication
  • Active Output Pulldown and Default Low Outputs with Low Supply or Floating Inputs
  • 2.25-V to 5.5-V Input Supply Voltage
  • 15-V to 30-V Output Driver Supply Voltage
  • CMOS Compatible Inputs
  • Rejects Input Pulses and Noise Transients Shorter Than 20 ns
  • Isolation Surge Withstand Voltage 12800-VPK
  • Safety-Related Certifications:
    • 8000-VPK VIOTM and 2121-VPK VIORM Reinforced Isolation per DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
    • 5700-VRMS Isolation for 1 Minute per UL 1577
    • CSA Component Acceptance Notice 5A, IEC 60950–1 and IEC 60601–1 End Equipment Standards
    • TUV Certification per EN 61010-1 and EN 60950-1
    • GB4943.1-2011 CQC Certification
    • All Certifications Complete per UL, VDE, CQC, TUV and Planned for CSA

All trademarks are the property of their respective owners.

The ISO5852S-Q1 device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15 V to maximum 30 V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.

An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 μs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2 potential, turning the IGBT immediately off.

When desaturation is active, a fault signal is sent across the isolation barrier, pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.

When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.

The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.

The ISO5852S-Q1 device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –40°C to +125°C ambient.

For all available packages, see the orderable addendum at the end of the data sheet.

The ISO5852S-Q1 device is a 5.7-kVRMS, reinforced isolated gate driver for IGBTs and MOSFETs with split outputs, OUTH and OUTL, providing 2.5-A source and 5-A sink current. The input side operates from a single 2.25-V to 5.5-V supply. The output side allows for a supply range from minimum 15 V to maximum 30 V. Two complementary CMOS inputs control the output state of the gate driver. The short propagation time of 76 ns provides accurate control of the output stage.

An internal desaturation (DESAT) fault detection recognizes when the IGBT is in an overcurrent condition. Upon a DESAT detect, a mute logic immediately blocks the output of the isolator and initiates a soft-turnoff procedure which disables the OUTH pin and pulls the OUTL pin to low over a time span of 2 μs. When the OUTL pin reaches 2 V with respect to the most-negative supply potential, VEE2, the gate-driver output is pulled hard to the VEE2 potential, turning the IGBT immediately off.

When desaturation is active, a fault signal is sent across the isolation barrier, pulling the FLT output at the input side low and blocking the isolator input. Mute logic is activated through the soft-turnoff period. The FLT output condition is latched and can be reset only after the RDY pin goes high, through a low-active pulse at the RST input.

When the IGBT is turned off during normal operation with a bipolar output supply, the output is hard clamp to VEE2. If the output supply is unipolar, an active Miller clamp can be used, allowing Miller current to sink across a low-impedance path which prevents the IGBT from dynamic turnon during high-voltage transient conditions.

The readiness for the gate driver to be operated is under the control of two undervoltage-lockout circuits monitoring the input-side and output-side supplies. If either side has insufficient supply, the RDY output goes low, otherwise this output is high.

The ISO5852S-Q1 device is available in a 16-pin SOIC package. Device operation is specified over a temperature range from –40°C to +125°C ambient.

For all available packages, see the orderable addendum at the end of the data sheet.
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Documentación técnica

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* Data sheet ISO5852S-Q1 High-CMTI 2.5-A and 5-A Reinforced Isolated IGBT, MOSFET Gate Driver With Split Outputs and Active Protection Features datasheet (Rev. A) PDF | HTML 22 dic 2016
Application note Choosing Appropriate Protection Approach for IGBT and SiC Power Modules PDF | HTML 19 jul 2024
Certificate VDE Certificate for Reinforced Isolation for DIN EN IEC 60747-17 (Rev. S) 29 feb 2024
Certificate ISO5x5x CQC Certificate of Product Certification 07 nov 2023
User guide UCC217xx and ISO5x5x Half-Bridge EVM User's Guide for Wolfspeed 1200-V SiC 01 sep 2023
Certificate ISO5451 CQC Certificate of Product Certification 16 ago 2023
Certificate TUV Certificate for Isolation Devices (Rev. K) 05 ago 2022
Certificate UL Certificate of Compliance File E181974 Vol 4 Sec 6 (Rev. P) 05 ago 2022
Application note Comparative Analysis of Two Different Methods for Gate-Drive Current Boosting (Rev. A) PDF | HTML 17 feb 2022
Application brief The Use and Benefits of Ferrite Beads in Gate Drive Circuits PDF | HTML 16 dic 2021
Certificate CSA Certification (Rev. Q) 14 jun 2021
Application brief External Gate Resistor Selection Guide (Rev. A) 28 feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 feb 2020
Application note Isolation Glossary (Rev. A) 19 sep 2017
EVM User's guide ISO5852S Evaluation Module User's Guide (Rev. A) 08 sep 2015

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

ISO5852SEVM — Módulo de evaluación de controlador de puerta IGBT/MOSFER aislada reforzada

This evaluation module, featuring ISO5852S reinforced isolated gate driver device, allows designers to evaluate device AC and DC performance with a pre-populated 1-nF load or with a user-installed IGBT in either of the standard TO-247 or TO-220 packages.

Guía del usuario: PDF
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Modelo de simulación

ISO5852S Unencrypted PSPICE Transient Model

SLLM446.ZIP (4 KB) - PSpice Model
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Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Diseños de referencia

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Design guide: PDF
Esquema: PDF
Diseños de referencia

TIDA-00794 — Diseño de referencia de protección térmica de módulos IGBT para inversores de tracción HEV/EV

The TIDA-00794 reference design is a temp sensing solution for IGBT thermal protection in HEV/EV traction inverter system. It monitors the IGBT temperature via the NTC thermistor integrated inside the IGBT module. It provides thermal shut down to the IGBT gate drivers once the NTC thermistor (...)
Design guide: PDF
Esquema: PDF
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SOIC (DW) 16 Ultra Librarian
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Pedidos y calidad

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  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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  • Lugar de fabricación
  • Lugar de ensamblaje

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