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SN65ELT21

ACTIVO

Traductor de PECL a TTL de 5 V

Detalles del producto

Function Receiver, Translator Protocols PECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 5 Signaling rate (MBits) 400 Input signal PECL Output signal TTL Rating Catalog Operating temperature range (°C) -40 to 85
Function Receiver, Translator Protocols PECL Number of transmitters 0 Number of receivers 1 Supply voltage (V) 5 Signaling rate (MBits) 400 Input signal PECL Output signal TTL Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9
  • 3ns (TYP) Propagation Delay
  • Operating Range: VCC = 4.2 V to 5.7 V with GND = 0 V
  • 24-mA TTL Output
  • Deterministic Output Value for Open Input Conditions or When Inputs < 1.3 V
  • Built-In Temperature Compensation
  • Drop-In Compatible to the MC10ELT21, MC100ELT21
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion for Clock or Data

  • 3ns (TYP) Propagation Delay
  • Operating Range: VCC = 4.2 V to 5.7 V with GND = 0 V
  • 24-mA TTL Output
  • Deterministic Output Value for Open Input Conditions or When Inputs < 1.3 V
  • Built-In Temperature Compensation
  • Drop-In Compatible to the MC10ELT21, MC100ELT21
  • APPLICATIONS
    • Data and Clock Transmission Over Backplane
    • Signaling Level Conversion for Clock or Data

The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V.

The VBB pin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCC and VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBB open when it is not used.

The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.

The SN65ELT21 is a differential PECL-to-TTL translator. It operates on +5-V supply and ground only. The device includes circuitry to maintain Q to a low logic level when inputs are in an open condition or < 1.3 V.

The VBB pin is a reference voltage output for the device. When the device is used in single-ended mode, the unused input should be tied to VBB. This reference voltage can also be used to bias the input when it is ac coupled. When it is used, place a 0.01µF decoupling capacitor between VCC and VBB. Also limit the sink/source current to < 0.5 mA to VBB. Leave VBB open when it is not used.

The SN65ELT21 is housed in an industry standard SOIC-8 package and is also available in an optional TSSOP-8 package.

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Documentación técnica

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Tipo Título Fecha
* Data sheet 5-V PECL-to-TTL Translator datasheet 26 jun 2009
Application note AC Coupling Between Differential LVPECL, LVDS, HSTL and CML (Rev. C) 17 oct 2007

Diseño y desarrollo

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Herramienta de simulación

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SOIC (D) 8 Ultra Librarian
VSSOP (DGK) 8 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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