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Circuitos integrados LVDS, M-LVDS y PECL

SN65LVDM051-Q1

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SN65LVDM051-Q1

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Detalles del producto

Function Transceiver Protocols LVDM, LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 500 Input signal LVDM, LVDS, LVTTL Output signal LVDM, LVDS, LVTTL Rating Automotive Operating temperature range (°C) -40 to 125
Function Transceiver Protocols LVDM, LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 500 Input signal LVDM, LVDS, LVTTL Output signal LVDM, LVDS, LVTTL Rating Automotive Operating temperature range (°C) -40 to 125
SOIC (D) 16 59.4 mm² 9.9 x 6
  • Qualified for Automotive Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Low-Voltage Differential 50- Line Drivers and Receivers
  • Signaling Rates up to 500 Mbps
  • Bus-Terminal ESD Exceeds 12 kV
  • Operates From a Single 3.3 V Supply
  • Low-Voltage Differential Signaling With Typical Output Voltages of 340 mV With a 50- Load
  • Valid Output With as Little as 50-mV Input Voltage Difference
  • Propagation Delay Times
    • Driver: 1.7 ns Typ
    • Receiver: 3.7 ns Typ
  • Power Dissipation at 200 MHz
    • Driver: 50 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5 V Tolerant
  • Driver Is High Impedance When Disabled or With VCC < 1.5 V
  • Receiver Has Open-Circuit Fail Safe
  • Qualified for Automotive Applications
  • ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
  • Low-Voltage Differential 50- Line Drivers and Receivers
  • Signaling Rates up to 500 Mbps
  • Bus-Terminal ESD Exceeds 12 kV
  • Operates From a Single 3.3 V Supply
  • Low-Voltage Differential Signaling With Typical Output Voltages of 340 mV With a 50- Load
  • Valid Output With as Little as 50-mV Input Voltage Difference
  • Propagation Delay Times
    • Driver: 1.7 ns Typ
    • Receiver: 3.7 ns Typ
  • Power Dissipation at 200 MHz
    • Driver: 50 mW Typical
    • Receiver: 60 mW Typical
  • LVTTL Input Levels Are 5 V Tolerant
  • Driver Is High Impedance When Disabled or With VCC < 1.5 V
  • Receiver Has Open-Circuit Fail Safe

The SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 500 Mbps (per TIA/EIA-644 definition). These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50- load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of these devices and signaling techniques is point-to-point and multipoint, baseband data transmission over a controlled impedance media of approximately 100 of characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables.

The SN65LVDM050Q and SN65LVDM051Q are characterized for operation from –40°C to 125°C. Additionally, Q1 suffixed parts are qualified in accordance with AEC-Q100 stress test qualification for integrated circuits.

The SN65LVDM050, and SN65LVDM051 are differential line drivers and receivers that use low-voltage differential signaling (LVDS) to achieve signaling rates as high as 500 Mbps (per TIA/EIA-644 definition). These circuits are similar to TIA/EIA-644 standard compliant devices (SN65LVDS) counterparts, except that the output current of the drivers is doubled. This modification provides a minimum differential output voltage magnitude of 247 mV across a 50- load simulating two transmission lines in parallel. This allows having data buses with more than one driver or with two line termination resistors. The receivers detect a voltage difference of 50 mV with up to 1 V of ground potential difference between a transmitter and receiver.

The intended application of these devices and signaling techniques is point-to-point and multipoint, baseband data transmission over a controlled impedance media of approximately 100 of characteristic impedance. The transmission media may be printed-circuit board traces, backplanes, or cables.

The SN65LVDM050Q and SN65LVDM051Q are characterized for operation from –40°C to 125°C. Additionally, Q1 suffixed parts are qualified in accordance with AEC-Q100 stress test qualification for integrated circuits.
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Documentación técnica

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* Data sheet High-Speed Differential Line Drivers And Receivers datasheet (Rev. A) 30 abr 2008
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 22 jun 2023
Application brief How Far, How Fast Can You Operate MLVDS? 06 ago 2018
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 20 nov 2001

Diseño y desarrollo

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Modelo de simulación

SN65LVDM051 IBIS Model

SLLM010.ZIP (51 KB) - IBIS Model
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PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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Pedidos y calidad

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