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SN65LVDT250

ACTIVO

Interruptor de conexión cruzada de 4x4 y 2.0 Gbps

Detalles del producto

Function Crosspoint Protocols CML, LVDS, LVPECL Number of transmitters 4 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 2000 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Crosspoint Protocols CML, LVDS, LVPECL Number of transmitters 4 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 2000 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DBT) 38 62.08 mm² 9.7 x 6.4
  • Greater Than 2.0 Gbps Operation
  • Nonblocking Architecture Allows Each Output to be Connected to Any Input
  • Pk.Pk Jitter:
    • 60 ps Typical at 2.0 Gbps
    • 110 ps Typical at 2.5 Gbps
  • Compatible With ANSI TIA/EIA-644-A LVDS Standard
  • Available Packaging 38-Pin TSSOP
  • 25 mV of Input Voltage Threshold Hysteresis
  • Propagation Delay Times: 800 ps Typical
  • Inputs Electrically Compatible With LVPECL, CML and LVDS Signal Levels
  • Operates From a Single 3.3-V Supply
  • Low Power: 110 mA Typical
  • Integrated 110- Line Termination Resistors Available With SN65LVDT250
  • APPLICATIONS
    • Clock Buffering/Clock Muxing
    • Wireless Base Stations
    • High-Speed Network Routing
    • Telecom/Datacom

  • Greater Than 2.0 Gbps Operation
  • Nonblocking Architecture Allows Each Output to be Connected to Any Input
  • Pk.Pk Jitter:
    • 60 ps Typical at 2.0 Gbps
    • 110 ps Typical at 2.5 Gbps
  • Compatible With ANSI TIA/EIA-644-A LVDS Standard
  • Available Packaging 38-Pin TSSOP
  • 25 mV of Input Voltage Threshold Hysteresis
  • Propagation Delay Times: 800 ps Typical
  • Inputs Electrically Compatible With LVPECL, CML and LVDS Signal Levels
  • Operates From a Single 3.3-V Supply
  • Low Power: 110 mA Typical
  • Integrated 110- Line Termination Resistors Available With SN65LVDT250
  • APPLICATIONS
    • Clock Buffering/Clock Muxing
    • Wireless Base Stations
    • High-Speed Network Routing
    • Telecom/Datacom

The SN65LVDS250 and SN65LVDT250 are 4x4 nonblocking crosspoint switches in a flow-through pin-out allowing for ease in PCB layout. Low-voltage differential signaling (LVDS) is used to achieve a high-speed data throughput while using low power. Each of the output drivers includes a 4:1 multiplexer to allow any input to be routed to any output. Internal signal paths are fully differential to achieve the high signaling speeds while maintaining low signal skews. The SN65LVDT250 incorporates 110- termination resistors for those applications where board space is a premium.

The SN65LVDS250 and SN65LVDT250 are characterized for operation from –40°C to 85°C.

The SN65LVDS250 and SN65LVDT250 are 4x4 nonblocking crosspoint switches in a flow-through pin-out allowing for ease in PCB layout. Low-voltage differential signaling (LVDS) is used to achieve a high-speed data throughput while using low power. Each of the output drivers includes a 4:1 multiplexer to allow any input to be routed to any output. Internal signal paths are fully differential to achieve the high signaling speeds while maintaining low signal skews. The SN65LVDT250 incorporates 110- termination resistors for those applications where board space is a premium.

The SN65LVDS250 and SN65LVDT250 are characterized for operation from –40°C to 85°C.

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Documentación técnica

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Tipo Título Fecha
* Data sheet SN65LVDS250, SN65LVDT250: LVDS 4X4 Crosspoint Switch datasheet (Rev. B) 14 oct 2004
EVM User's guide 4x4 Crosspoint Switch EVM User's Guide (Rev. A) 29 ene 2004

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

SN65LVDT250 IBIS Model

SLLC215.ZIP (11 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
TSSOP (DBT) 38 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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