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Circuitos integrados LVDS, M-LVDS y PECL

SN65MLVD206B

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Transceptor M-LVDS de 200 Mbps con inmunidad alta al ruido

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SN65MLVD206B

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Detalles del producto

Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Transceiver Protocols M-LVDS Number of transmitters 1 Number of receivers 1 Supply voltage (V) 3.3 Signaling rate (Mbps) 200 Input signal LVTTL, M-LVDS Output signal LVTTL, M-LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 8 29.4 mm² 4.9 x 6
  • Compatible with the M-LVDS standard TIA/EIA-899 for multipoint data interchange
  • Low-voltage differential 30-Ω to 55-Ω line driver and receiver for signaling rates(1) up to
    200 Mbps, clock frequencies up to 100 MHz
    • Type-2 receiver provides an offset threshold to detect open-circuit and idle-bus conditions
  • Bus I/O Protection
    • ±8-kV HBM
    • ±8-kV IEC 61000-4-2 Contact discharge
  • Controlled driver output voltage transition times for improved signal quality
  • –1-V to 3.4-V Common-mode voltage range allows data transfer with 2 V of ground noise
  • Bus pins high impedance when disabled or VCC ≤ 1.5 V
  • 100-Mbps Device Available (SN65MLVD204B)
  • Improved Alternatives to SN65MLVD206 (1)

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the bps of the unit (bits per second).
  • Compatible with the M-LVDS standard TIA/EIA-899 for multipoint data interchange
  • Low-voltage differential 30-Ω to 55-Ω line driver and receiver for signaling rates(1) up to
    200 Mbps, clock frequencies up to 100 MHz
    • Type-2 receiver provides an offset threshold to detect open-circuit and idle-bus conditions
  • Bus I/O Protection
    • ±8-kV HBM
    • ±8-kV IEC 61000-4-2 Contact discharge
  • Controlled driver output voltage transition times for improved signal quality
  • –1-V to 3.4-V Common-mode voltage range allows data transfer with 2 V of ground noise
  • Bus pins high impedance when disabled or VCC ≤ 1.5 V
  • 100-Mbps Device Available (SN65MLVD204B)
  • Improved Alternatives to SN65MLVD206 (1)

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the bps of the unit (bits per second).

The SN65MLVD206B device is a multipoint low-voltage differential signaling (M-LVDS) line driver and receiver which is optimized to operate at signaling rates up to 200 Mbps. This device has a robust 3.3-V driver and receiver in the standard SOIC footprint for demanding industrial applications. The bus pins are robust to ESD events, with high levels of protection to human-body model and IEC contact discharge specifications.

The device combines a differential driver and a differential receiver (transceiver), which operates from a single 3.3-V supply. The transceiver is optimized to operate at signaling rates up to 200 Mbps.

The SN65MLVD206B has enhancements over similar devices. Improved features include a controlled slew rate on the driver output to help minimize reflections from unterminated stubs, resulting in better signal integrity. The same footprint definition was maintained, allowing for an easy drop-in replacement for a system performance upgrade. The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD206B M-LVDS transceiver is part of the TI extensive M-LVDS portfolio.

The SN65MLVD206B device is a multipoint low-voltage differential signaling (M-LVDS) line driver and receiver which is optimized to operate at signaling rates up to 200 Mbps. This device has a robust 3.3-V driver and receiver in the standard SOIC footprint for demanding industrial applications. The bus pins are robust to ESD events, with high levels of protection to human-body model and IEC contact discharge specifications.

The device combines a differential driver and a differential receiver (transceiver), which operates from a single 3.3-V supply. The transceiver is optimized to operate at signaling rates up to 200 Mbps.

The SN65MLVD206B has enhancements over similar devices. Improved features include a controlled slew rate on the driver output to help minimize reflections from unterminated stubs, resulting in better signal integrity. The same footprint definition was maintained, allowing for an easy drop-in replacement for a system performance upgrade. The devices are characterized for operation from –40°C to 85°C.

The SN65MLVD206B M-LVDS transceiver is part of the TI extensive M-LVDS portfolio.
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Documentación técnica

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Tipo Título Fecha
* Data sheet SN65MLVD206B Multipoint-LVDS Line Driver and Receiver (Transceiver) With IEC ESD Protection datasheet (Rev. A) PDF | HTML 06 feb 2018
Application note An Introduction to M-LVDS and Clock and Data Distribution Applications (Rev. C) PDF | HTML 22 jun 2023
Application note Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners 29 jun 2019
Application brief How Far, How Fast Can You Operate MLVDS? 06 ago 2018
Technical article Why should you care about the noise immunity of MLVDS drivers and receivers? PDF | HTML 26 jul 2017
Application note SPI-Based Data Acquisition/Monitor Using the TLC2551 Serial ADC (Rev. A) 20 nov 2001

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

MLVD20XBEVM — Módulo de evaluación LVDS multipunto (M-LVDS) dúplex completo y semidúplex SN65MLVD203B y SN65MLVD20

Guía del usuario: PDF
No disponible en TI.com
Placa de evaluación

MLVD20XEVM — Módulo de evaluación M-LVDS

This evaluation module is for the SN65MLVD203B and SN65MLVD204B, which are M-LVDS transceivers.
The SN65MLVD203B is a full-duplex transceiver, and the SN65MLVD204B is a half-duplex transceiver.
Guía del usuario: PDF
No disponible en TI.com
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
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Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 8 Ultra Librarian
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Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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