Function Dual-loop PLL, Ultra-low jitter clock generator Number of outputs 15 RMS jitter (fs) 54 Output frequency (max) (MHz) 3255 Input type HCSL, LVCMOS, LVDS, LVPECL Output type CML, HSDS, LVCMOS, LVDS, LVPECL Supply voltage (min) (V) 3.135 Supply voltage (max) (V) 3.465 Features 0 Delay, Integrated VCO, JESD204B, Loss of signal detection, Manual/auto switch, Programmable Delay, SPI Rating Automotive Operating temperature range (°C) -40 to 125 Number of input channels 3
Function Dual-loop PLL, Ultra-low jitter clock generator Number of outputs 15 RMS jitter (fs) 54 Output frequency (max) (MHz) 3255 Input type HCSL, LVCMOS, LVDS, LVPECL Output type CML, HSDS, LVCMOS, LVDS, LVPECL Supply voltage (min) (V) 3.135 Supply voltage (max) (V) 3.465 Features 0 Delay, Integrated VCO, JESD204B, Loss of signal detection, Manual/auto switch, Programmable Delay, SPI Rating Automotive Operating temperature range (°C) -40 to 125 Number of input channels 3