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TPL7407LA

現行

30-V、7 通道 NMOS 陣列低壓側驅動器

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產品規格表

TPL7407LA

現行
產品規格表 立即訂購

產品詳細資料

Rating Catalog Operating temperature range (°C) -40 to 125 Drivers per package 7 Switching voltage (max) (V) 32 Output voltage (max) (V) 30 Peak output current (A) 0.5 Delay time (typ) (ns) 250 Input compatibility CMOS, TTL Vol at lowest spec current (typ) (mV) 210 Iout/ch (max) (mA) 600 Iout_off (typ) (µA) 0.01
Rating Catalog Operating temperature range (°C) -40 to 125 Drivers per package 7 Switching voltage (max) (V) 32 Output voltage (max) (V) 30 Peak output current (A) 0.5 Delay time (typ) (ns) 250 Input compatibility CMOS, TTL Vol at lowest spec current (typ) (mV) 210 Iout/ch (max) (mA) 600 Iout_off (typ) (µA) 0.01
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • 600-mA Rated Drain Current (Per Channel)
  • CMOS Pin-to-Pin Improvement of 7-channel Darlington Array (For example: ULN2003A)
  • Power Efficient (Very low VOL)
    • Less Than 4 Times Lower VOL at 100 mA Than Darlington Array
  • Very Low Output Leakage < 10 nA Per Channel
  • Extended Ambient Temperature Range:
    TA = –40°C to +125°C
  • High-Voltage Outputs 30 V
  • Compatible with 1.8-V to 5-V Microcontroller and Logic Interface
  • Internal Free-wheeling Diodes for Inductive Kick-back Protection
  • Input Pull-down Resistors Allows Tri-stating the Input Driver
  • Input RC-Snubber to Eliminate Spurious Operation in Noisy Environment
  • Inductive Load Driver Applications
  • ESD Protection Exceeds JESD 22
    • 2-kV HBM, 500-V CDM
  • Available in 16-pin SOIC and TSSOP packages
  • 600-mA Rated Drain Current (Per Channel)
  • CMOS Pin-to-Pin Improvement of 7-channel Darlington Array (For example: ULN2003A)
  • Power Efficient (Very low VOL)
    • Less Than 4 Times Lower VOL at 100 mA Than Darlington Array
  • Very Low Output Leakage < 10 nA Per Channel
  • Extended Ambient Temperature Range:
    TA = –40°C to +125°C
  • High-Voltage Outputs 30 V
  • Compatible with 1.8-V to 5-V Microcontroller and Logic Interface
  • Internal Free-wheeling Diodes for Inductive Kick-back Protection
  • Input Pull-down Resistors Allows Tri-stating the Input Driver
  • Input RC-Snubber to Eliminate Spurious Operation in Noisy Environment
  • Inductive Load Driver Applications
  • ESD Protection Exceeds JESD 22
    • 2-kV HBM, 500-V CDM
  • Available in 16-pin SOIC and TSSOP packages

The TPL7407LA is a high-voltage, high-current NMOS transistor array. This device consists of seven NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. New regulation and drive circuitry added to give maximum drive strength across all GPIO ranges (1.8 V–5 V).The transistors can be paralleled for higher current capability.

The TPL7407LA key benefit is its improved power efficiency and lower leakage than a Bipolar Darlington Implementation. With the lower VOL the user is dissipating less than half the power than traditional relay drivers with currents less than 250 mA per channel.

The TPL7407LA is a high-voltage, high-current NMOS transistor array. This device consists of seven NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. New regulation and drive circuitry added to give maximum drive strength across all GPIO ranges (1.8 V–5 V).The transistors can be paralleled for higher current capability.

The TPL7407LA key benefit is its improved power efficiency and lower leakage than a Bipolar Darlington Implementation. With the lower VOL the user is dissipating less than half the power than traditional relay drivers with currents less than 250 mA per channel.
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類型 標題 日期
* Data sheet TPL7407LA 30-V 7-Channel Low Side Driver datasheet (Rev. A) PDF | HTML 2018年 3月 28日
E-book 11 Ways to Protect Your Power Path 2019年 7月 3日
Application note Basics of Power Switches (Rev. A) PDF | HTML 2019年 4月 26日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPL7407LEVM — TPL7407L - 40V 低壓側驅動器評估模組

TPL7407LEVM 是展示積體電路 TPL7407LDR 的 7 通道繼電器，以及電感性負載汲極驅動器評估模組。TPL7407LDR 是一款高性能週邊驅動器，專門用於驅動多種類型的負載，包括繼電器、步進馬達、燈泡和發光二極體。此 EVM 配置有七個按鈕，可為 TPL7407L 驅動器提供輸入，而七個繼電器則由 TPL7407L 輸出驅動。四端子區塊必須連接至外部電源，以提供輸入和繼電器電源。所有 TPL7407L 輸入和輸出針腳皆可採用外部連接。

使用指南: PDF
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模擬型號

TPL7407L TINA-TI Reference Design

SLRM002.TSC (1476 KB) - TINA-TI Reference Design
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模擬型號

TPL7407L TINA-TI Spice Model

SLRM001.ZIP (4 KB) - TINA-TI Spice Model
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模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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參考設計

TIDA-010085 — 使用數位隔離器的 24-VAC 多通道固態繼電器參考設計

此參考設計展示使用單一隔離的多通道固態繼電器 (SSR)。此設計採用含單一隔離式電源供應器與通用接地閘極驅動電路的多通道數位隔離器，以獨立控制多個 SSR。此設計適用 24-VAC 供電繼電器，額定電流可達 2A，但可擴充至 240VAC 和更高的額定電流。每個 SSR 通道消耗的空間小於 75 mm 2，組件的最大高度約爲 3 mm，與機電繼電器相比，可大幅節省尺寸。使用單一隔離式電源可減少機板空間及 BOM 成本。
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
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