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線性與低壓差 (LDO) 穩壓器

TPS7A84A

現行

具有電源良好功能的 3-A、低 VIN (1.1-V)、低雜訊、高準確度、超低壓差電壓穩壓器

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TPS7A84 現行 具有高準確度且具有電源良好功能的 3-A、低 VIN、低雜訊、超低壓差電壓穩壓器 3-A LDO regulator with good accuracy (1%) and improved thermal resistance (35.4°C/W).

TPS7A84A

現行
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產品詳細資料

Output options Adjustable Output, Fixed Output, Programmable Output Iout (max) (A) 3 Vin (max) (V) 6.5 Vin (min) (V) 1.1 Vout (max) (V) 5.15 Vout (min) (V) 0.5 Rating Catalog Noise (µVrms) 4.4 PSRR at 100 KHz (dB) 25 Iq (typ) (mA) 2.8 Thermal resistance θJA (°C/W) 43 Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Foldback Overcurrent protection, Foldback overcurrent protection, Output discharge, Power good, Soft start Accuracy (%) 0.75 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output, Programmable Output Iout (max) (A) 3 Vin (max) (V) 6.5 Vin (min) (V) 1.1 Vout (max) (V) 5.15 Vout (min) (V) 0.5 Rating Catalog Noise (µVrms) 4.4 PSRR at 100 KHz (dB) 25 Iq (typ) (mA) 2.8 Thermal resistance θJA (°C/W) 43 Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Foldback Overcurrent protection, Foldback overcurrent protection, Output discharge, Power good, Soft start Accuracy (%) 0.75 Dropout voltage (Vdo) (typ) (mV) 110 Operating temperature range (°C) -40 to 125
VQFN (RGR) 20 12.25 mm² 3.5 x 3.5
  • Low dropout: 180 mV (maximum) at 3 A with BIAS
  • 0.75% (maximum) accuracy over line, load, and temperature with BIAS
  • Output voltage noise: 4.4 µVRMS
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • TPS7A8400A output voltage range:
    • Adjustable operation: 0.8 V to 5.15 V
    • ANY-OUT™ operation: 0.8 V to 3.95 V
  • TPS7A8401A output voltage range:
    • Adjustable operation: 0.5 V to 5.15 V
    • ANY-OUT™ operation: 0.5 V to 2.075 V
  • Power-supply ripple rejection:
    • 40 dB at 500 kHz
  • Excellent load transient response
  • Adjustable soft-start in-rush control
  • Open-drain power-good (PG) output
  • Low dropout: 180 mV (maximum) at 3 A with BIAS
  • 0.75% (maximum) accuracy over line, load, and temperature with BIAS
  • Output voltage noise: 4.4 µVRMS
  • Input voltage range:
    • Without BIAS: 1.4 V to 6.5 V
    • With BIAS: 1.1 V to 6.5 V
  • TPS7A8400A output voltage range:
    • Adjustable operation: 0.8 V to 5.15 V
    • ANY-OUT™ operation: 0.8 V to 3.95 V
  • TPS7A8401A output voltage range:
    • Adjustable operation: 0.5 V to 5.15 V
    • ANY-OUT™ operation: 0.5 V to 2.075 V
  • Power-supply ripple rejection:
    • 40 dB at 500 kHz
  • Excellent load transient response
  • Adjustable soft-start in-rush control
  • Open-drain power-good (PG) output

The TPS7A84A is a low-noise, low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180-mV of maximum dropout. The device is offered in two output voltage ranges. The TPS7A8400A output voltage is pin-programmable from 0.8 V to 3.95 V, with a 50-mV resolution, and adjustable from 0.8 V to 5.15 V using an external resistor divider. The TPS7A8401A output voltage is pin-programmable from 0.5 V to 2.075 V, with a 25-mV resolution, and adjustable from 0.5 V to 5.15 V using an external resistor divider.

The combination of low-noise, high-PSRR, and high output-current capability makes the TPS7A84A ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84A limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and > 5-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over line, load, and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84A ensure optimal system performance.

The versatility of the TPS7A84A makes the device a component of choice for many demanding applications.

The TPS7A84A is a low-noise, low-dropout linear regulator (LDO) capable of sourcing 3 A with only 180-mV of maximum dropout. The device is offered in two output voltage ranges. The TPS7A8400A output voltage is pin-programmable from 0.8 V to 3.95 V, with a 50-mV resolution, and adjustable from 0.8 V to 5.15 V using an external resistor divider. The TPS7A8401A output voltage is pin-programmable from 0.5 V to 2.075 V, with a 25-mV resolution, and adjustable from 0.5 V to 5.15 V using an external resistor divider.

The combination of low-noise, high-PSRR, and high output-current capability makes the TPS7A84A ideal to power noise-sensitive components such as those found in high-speed communications, video, medical, or test and measurement applications. The high performance of the TPS7A84A limits power-supply-generated phase noise and clock jitter, making this device ideal for powering high-performance serializer and deserializer (SerDes), analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and RF components. Specifically, RF amplifiers benefit from the high-performance and > 5-V output capability of the device.

For digital loads [such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and digital signal processors (DSPs)] requiring low-input voltage, low-output (LILO) voltage operation, the exceptional accuracy (0.75% over line, load, and temperature), remote sensing, excellent transient performance, and soft-start capabilities of the TPS7A84A ensure optimal system performance.

The versatility of the TPS7A84A makes the device a component of choice for many demanding applications.
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TPS74401 現行 3-A、低 VIN (0.8-V)、低雜訊、高 PSRR、可調式超低壓降電壓穩壓器 3-A LDO regulator with a smaller VOUT range (0.8 V to 3.3 V).

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類型 標題 日期
* Data sheet TPS7A84A 3-A, High-Accuracy (0.75%), Low-Noise (4.4-µVRMS) LDO Regulator datasheet (Rev. C) PDF | HTML 2020年 12月 16日
White paper Demystifying LDO Turn-On (startup) Time PDF | HTML 2024年 10月 5日
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 2022年 12月 14日
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 2022年 12月 13日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPS7A84EVM-753 — TPS7A84 3A 高電流、1% 高準確度、4.4μVRMS LDO 穩壓器評估模組

The TPS7A84EVM-753 evaluation module is designed for a typical configuration to evaluate the operation and performance of the TPS7A84, High-Current 3-A low dropout voltage regulator. The EVM circuit board is configured to be a reference design for engineering applications requiring current to a (...)
使用指南: PDF
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模擬型號

TPS7A84 PSpice Transient Model

SBVM575.ZIP (76 KB) - PSpice Model
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模擬型號

TPS7A84 Unencrypted PSpice Transient Model

SBVM574.ZIP (3 KB) - PSpice Model
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計算工具

PARALLEL-LDO-CALC — Parallel low-dropout (LDO) calculator

The parallel low-dropout (LDO) calculator is a Microsoft® Excel®-based tool that provides worst-case analysis for parallel LDO regulators using ballast resistors. The tool helps the user identify the minimum number of parallel LDO regulators required and optimum ballast resistance for a (...)

支援產品和硬體

支援產品和硬體

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硬體開發
開發板
TPS7A57EVM-081 — 適用於 5-A 低雜訊高準確度低壓差 (LDO) 電壓穩壓器的 TPS7A57 評估模組
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參考設計

TIDA-01027 — 在 12.8 GSPS 資料採集系統中發揮最大效能的低雜訊電源供應參考設計

This reference design demonstrates an efficient, low-noise five-rail power supply design for very high-speed Data Acquisition (DAQ) systems capable of > 12.8 GSPS. The power supply DC/DC converters are frequency-synchronized and phase-shifted in order to minimize input current ripple and (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-01232 — 高電流低雜訊並聯 LDO 參考設計

This parallel low-dropout (LDO) reference design showcases the TPS7A85 low-noise LDO linear regulator in a parallel configuration, which is capable of sourcing 3.5 A per LDO or 7 A per board. Additional design flexibility includes the ability to stack this design to meet the current (...)
Design guide: PDF
電路圖: PDF
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