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Circuitos integrados Ethernet
Capa física (PHY) Ethernet

DP83816EX

NO RECOMENDADO PARA NUEVOS DISEÑOS

Controlador de acceso a medios PCI Ethernet integrado de 10/100 Mbps y capa física (MacPhyter-II) ex

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DP83816EX

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Detalles del producto

Datarate (Mbps) 10/100 Interface type PCI (33MHz) Number of ports Single Rating Catalog Features 5-V tolerant I/Os Supply voltage (V) 3.3 Operating temperature range (°C) 0 to 0 Number of LEDs 3 ESD HBM (kV) 2
Datarate (Mbps) 10/100 Interface type PCI (33MHz) Number of ports Single Rating Catalog Features 5-V tolerant I/Os Supply voltage (V) 3.3 Operating temperature range (°C) 0 to 0 Number of LEDs 3 ESD HBM (kV) 2
LQFP (PGE) 144 484 mm² 22 x 22
  • IEEE 802.3 Compliant, PCI V2.2 MAC/BIU supports traditional data rates of 10 Mb/s Ethernet and 100 Mb/s Fast Ethernet (via internal phy)
  • Bus master - burst sizes of up to 128 dwords (512 bytes)
  • BIU compliant with PC 97 and PC 98 Hardware Design Guides, PC 99 Hardware Design Guide draft, ACPI v1.0, PCI Power Management Specification v1.1, OnNow Device Class Power Management Reference Specification - Network Device Class v1.0a
  • Wake on LAN (WOL) support compliant with PC98, PC99, SecureOn, and OnNow, including directed packets, Magic Packet, VLAN packets, ARP packets, pattern match packets, and Phy status change
  • Clkrun function for PCI Mobile Design Guide
  • Virtual LAN (VLAN) and long frame support
  • Support for IEEE 802.3x Full duplex flow control
  • Extremely flexible Rx packet filtration including: single address perfect filter with MSb masking, broadcast, 512 entry multicast/unicast hash table, deep packet pattern matching for up to 4 unique patterns
  • Statistics gathered for support of RFC 1213 (MIB II), RFC 1398 (Ether-like MIB), IEEE 802.3 LME, reducing CPU overhead for management
  • Internal 2 KB Transmit and 2 KB Receive data FIFOs
  • Serial EEPROM port with auto-load of configuration data from EEPROM at power-on
  • Flash/PROM interface for remote boot support
  • Fully integrated IEEE 802.3/802.3u 3.3V CMOS physical layer
  • IEEE 802.3 10BASE-T transceiver with integrated filters
  • IEEE 802.3u 100BASE-TX transceiver
  • Fully integrated ANSI X3.263 compliant TP-PMD physical sublayer with adaptive equalization and Baseline Wander compensation
  • IEEE 802.3u Auto-Negotiation - advertised features configurable via EEPROM
  • Full Duplex support for 10 and 100 Mb/s data rates
  • Single 25 MHz reference clock
  • 144-pin LQFP package
  • Low power 3.3V CMOS design with typical consumption of 383 mW operating, 297 mW during WOL and 53 mW during sleep mode
  • IEEE 802.3u MII for connecting alternative external Physical Layer Devices
  • 3.3V signalling with 5V tolerant I/O

MacPHYTER-II™ is a trademark of National Semiconductor Corporation.
  • IEEE 802.3 Compliant, PCI V2.2 MAC/BIU supports traditional data rates of 10 Mb/s Ethernet and 100 Mb/s Fast Ethernet (via internal phy)
  • Bus master - burst sizes of up to 128 dwords (512 bytes)
  • BIU compliant with PC 97 and PC 98 Hardware Design Guides, PC 99 Hardware Design Guide draft, ACPI v1.0, PCI Power Management Specification v1.1, OnNow Device Class Power Management Reference Specification - Network Device Class v1.0a
  • Wake on LAN (WOL) support compliant with PC98, PC99, SecureOn, and OnNow, including directed packets, Magic Packet, VLAN packets, ARP packets, pattern match packets, and Phy status change
  • Clkrun function for PCI Mobile Design Guide
  • Virtual LAN (VLAN) and long frame support
  • Support for IEEE 802.3x Full duplex flow control
  • Extremely flexible Rx packet filtration including: single address perfect filter with MSb masking, broadcast, 512 entry multicast/unicast hash table, deep packet pattern matching for up to 4 unique patterns
  • Statistics gathered for support of RFC 1213 (MIB II), RFC 1398 (Ether-like MIB), IEEE 802.3 LME, reducing CPU overhead for management
  • Internal 2 KB Transmit and 2 KB Receive data FIFOs
  • Serial EEPROM port with auto-load of configuration data from EEPROM at power-on
  • Flash/PROM interface for remote boot support
  • Fully integrated IEEE 802.3/802.3u 3.3V CMOS physical layer
  • IEEE 802.3 10BASE-T transceiver with integrated filters
  • IEEE 802.3u 100BASE-TX transceiver
  • Fully integrated ANSI X3.263 compliant TP-PMD physical sublayer with adaptive equalization and Baseline Wander compensation
  • IEEE 802.3u Auto-Negotiation - advertised features configurable via EEPROM
  • Full Duplex support for 10 and 100 Mb/s data rates
  • Single 25 MHz reference clock
  • 144-pin LQFP package
  • Low power 3.3V CMOS design with typical consumption of 383 mW operating, 297 mW during WOL and 53 mW during sleep mode
  • IEEE 802.3u MII for connecting alternative external Physical Layer Devices
  • 3.3V signalling with 5V tolerant I/O

MacPHYTER-II™ is a trademark of National Semiconductor Corporation.

DP83816-EX is a single-chip 10/100 Mb/s Ethernet Controller for the PCI bus. It is targeted at single board computers for embedded applications requiring a high speed PCI bus.. The DP83816-EX fully implements the V2.2 33 MHz PCI bus interface for host communications with power management support. Packet descriptors and data are transferred via bus-mastering, reducing the burden on the host CPU. The DP83816-EX can support full duplex 10/100 Mb/s transmission and reception, with minimum interframe gap.

The DP83816-EX device is an integration of an enhanced version of the National Semiconductor PCI MAC/BIU (Media Access Controller/Bus Interface Unit) and a 3.3V CMOS physical layer interface.

DP83816-EX is a single-chip 10/100 Mb/s Ethernet Controller for the PCI bus. It is targeted at single board computers for embedded applications requiring a high speed PCI bus.. The DP83816-EX fully implements the V2.2 33 MHz PCI bus interface for host communications with power management support. Packet descriptors and data are transferred via bus-mastering, reducing the burden on the host CPU. The DP83816-EX can support full duplex 10/100 Mb/s transmission and reception, with minimum interframe gap.

The DP83816-EX device is an integration of an enhanced version of the National Semiconductor PCI MAC/BIU (Media Access Controller/Bus Interface Unit) and a 3.3V CMOS physical layer interface.
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* Data sheet 10/100 Mb/s Integrated PCI Ethernet MAC & PHY (MacPhyter-II) Temp Range 0-85C datasheet 06 jun 2007

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje