The DS90CR287 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted.
The DS90CR288A receiver converts the four LVDS data streams back into 28 bits of LVCMOS/LVTTL data. At a transmit clock frequency of 85 MHz, 28 bits of TTL data are transmitted at a rate of 595 Mbps per LVDS data channel. Using a 85 MHz clock, the data throughput is 2.38 Gbit/s (297.5 Mbytes/sec).
This chipset is an ideal means to solve EMI and cable size problems associated with wide, high-speed TTL interfaces.
| Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link 85MHz datasheet (Rev. G) | 05 mar 2013 | |
| Application note | High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs | 09 nov 2018 | ||
| Application note | Receiver Skew Margin for Channel Link I and FPD Link I Devices | 13 ene 2016 | ||
| Application note | Improving the Robustness of Channel Link Designs with Channel Link II Ser/Des (Rev. A) | 26 abr 2013 | ||
| EVM User's guide | 28-Bit Channel Link SerDes Evaluation Board 20-85MHz User Guide | 25 ene 2012 | ||
| Design guide | Channel Link I Design Guide | 29 mar 2007 | ||
| Application note | Multi-Drop Channel-Link Operation | 04 oct 2004 | ||
| Application note | CHANNEL LINK Moving and Shaping Information In Point-To-Point Applications | 05 oct 1998 |
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
The FPD-Link evaluation kit includes a transmitter (Tx) board, a receiver (Rx) board and interfacing cables. This kit shows the chipsets interfacing from test equipment or a graphics controller using low-voltage differential signaling (LVDS) to a receiver board.
The transmitter board accepts (...)
| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| NFBGA (NZC) | 64 | Ultra Librarian |
| TSSOP (DGG) | 56 | Ultra Librarian |
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