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DS92LV2421

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Serializador Channel Link II de 24 bits y 10 MHz a 75 MHz

Detalles del producto

Protocols Catalog Rating Catalog Operating temperature range (°C) -40 to 85
Protocols Catalog Rating Catalog Operating temperature range (°C) -40 to 85
WQFN (RHS) 48 49 mm² 7 x 7
  • 24-Bit Data, 3-Bit Control, 10- to 75-MHz Clock
  • AC-Coupled STP Interconnect Cable up to 10 m
  • Integrated Terminations on Serializer and
    Deserializer
  • At-Speed Link BIST Mode and Reporting Pin
  • Optional I2C-Compatible Serial Control Bus
  • Power-Down Mode Minimizes Power Dissipation
  • 1.8-V or 3.3-V Compatible LVCMOS I/O Interface
  • –40° to 85°C Temperature Range
  • >8-kV HBM
  • Serializer (DS92LV2421)
    • Data Scrambler for Reduced EMI
    • DC-Balance Encoder for AC Coupling
    • Selectable Output VOD and Adjustable
      De-emphasis
  • Deserializer (DS92LV2422)
    • Fast Random Data Lock; No Reference Clock
      Required
    • Adjustable Input Receiver Equalization
    • LOCK (Real-Time Link Status) Reporting Pin
    • EMI Minimization on Output Parallel Bus
      (SSCG)
    • Output Slew Control (OS)
  • 24-Bit Data, 3-Bit Control, 10- to 75-MHz Clock
  • AC-Coupled STP Interconnect Cable up to 10 m
  • Integrated Terminations on Serializer and
    Deserializer
  • At-Speed Link BIST Mode and Reporting Pin
  • Optional I2C-Compatible Serial Control Bus
  • Power-Down Mode Minimizes Power Dissipation
  • 1.8-V or 3.3-V Compatible LVCMOS I/O Interface
  • –40° to 85°C Temperature Range
  • >8-kV HBM
  • Serializer (DS92LV2421)
    • Data Scrambler for Reduced EMI
    • DC-Balance Encoder for AC Coupling
    • Selectable Output VOD and Adjustable
      De-emphasis
  • Deserializer (DS92LV2422)
    • Fast Random Data Lock; No Reference Clock
      Required
    • Adjustable Input Receiver Equalization
    • LOCK (Real-Time Link Status) Reporting Pin
    • EMI Minimization on Output Parallel Bus
      (SSCG)
    • Output Slew Control (OS)

The DS92LV242x chipset translates a parallel 24–bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size, and reduces interconnect cost for transferring a 24-bit or less bus over FR-4 printed-circuit board backplanes and balanced cables. In addition, the DS92LV242x chipset also features a 3-bit control bus for slow speed signals. This allows for video and display applications with up to 24 bits per pixel (RGB).

Programmable transmit de-emphasis, receive equalization, on-chip scrambling, and DC balancing enables longer distance transmission over lossy cables and backplanes. The DS92LV2422 automatically locks to incoming data without an external reference clock or special sync patterns, providing easy plug-and-go operation. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking capability.

The DS92LV242x chipset is programmable though an I2C interface as well as through pins. A built-in, at-speed BIST feature validates link integrity and may be used for system diagnostics. The DS92LV2421 is offered in a 48-pin WQFN, and the DS92LV2422 is offered in a 60-pin WQFN package. Both devices operate over the full industrial temperature range of –40°C to 85°C.

The DS92LV242x chipset translates a parallel 24–bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size, and reduces interconnect cost for transferring a 24-bit or less bus over FR-4 printed-circuit board backplanes and balanced cables. In addition, the DS92LV242x chipset also features a 3-bit control bus for slow speed signals. This allows for video and display applications with up to 24 bits per pixel (RGB).

Programmable transmit de-emphasis, receive equalization, on-chip scrambling, and DC balancing enables longer distance transmission over lossy cables and backplanes. The DS92LV2422 automatically locks to incoming data without an external reference clock or special sync patterns, providing easy plug-and-go operation. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking capability.

The DS92LV242x chipset is programmable though an I2C interface as well as through pins. A built-in, at-speed BIST feature validates link integrity and may be used for system diagnostics. The DS92LV2421 is offered in a 48-pin WQFN, and the DS92LV2422 is offered in a 60-pin WQFN package. Both devices operate over the full industrial temperature range of –40°C to 85°C.

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Documentación técnica

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Tipo Título Fecha
* Data sheet DS92LV242x 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer datasheet (Rev. C) PDF | HTML 31 may 2016
Application note High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs 09 nov 2018
Application note How to Design LVDS SerDes in Industrial Systems 16 jul 2018
Technical article Applications of Low Voltage Differential Signaling (LVDS) in Multifunction and Ind PDF | HTML 24 ago 2017
Application note DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E) 29 abr 2013
User guide LV24EVK01 Channel Link II Ser/Des Evaluation Kit User Guide 25 ene 2012
Design guide Channel Link II Design Guide 21 ene 2011
Application note Go the Distance: Industrial SerDes with Embedded Clock and Control 20 oct 2010

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

LV24EVK01 — Kit de evaluación LV24EVK01

The LV24EVK01 is an evaluation kit designed to demonstrate performance and capabilities of the DS92LV2421 and DS92LV2422 Channel Link II Serializer/Deserializer chipset.

The DS92LV2421 serializer board accepts LVCMOS input signals and provides a single serialized Channel Link II CML data pair as an (...)

Guía del usuario: PDF
Modelo de simulación

DS92LV2421 IBIS Model

SNLM126.ZIP (74 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
WQFN (RHS) 48 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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