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SN65LVDS122

ACTIVO

Interruptor de conexión cruzada LVDS de 2x2 y 1.5 Gbps

Detalles del producto

Function Crosspoint Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 1500 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
Function Crosspoint Protocols LVDS Number of transmitters 2 Number of receivers 2 Supply voltage (V) 3.3 Signaling rate (Mbps) 1500 Input signal CML, LVDS, LVPECL Output signal LVDS Rating Catalog Operating temperature range (°C) -40 to 85
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Designed for Signaling Rates(1) Up To 1.5 Gbps
  • Total Jitter < 65 ps
  • Pin-Compatible With SN65LVDS22 and SN65LVDM22
  • 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Common-Mode Range
  • Inputs Electrically Compatible With CML, LVPECL and LVDS Signal Levels
  • Propagation Delay Times, 900 ps Maximum
  • LVDT Integrates 110- Terminating Resistor
  • Offered in SOIC and TSSOP
  • APPLICATIONS
    • 10-G (OC–192) Optical Modules
    • 622 MHz Central Office Clock Distribution
    • Wireless Basestations
    • Low Jitter Clock Repeater/Multiplexer
    • Protection Switching for Serial Backplanes

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

  • Designed for Signaling Rates(1) Up To 1.5 Gbps
  • Total Jitter < 65 ps
  • Pin-Compatible With SN65LVDS22 and SN65LVDM22
  • 25 mV of Receiver Input Threshold Hysteresis Over 0-V to 4-V Common-Mode Range
  • Inputs Electrically Compatible With CML, LVPECL and LVDS Signal Levels
  • Propagation Delay Times, 900 ps Maximum
  • LVDT Integrates 110- Terminating Resistor
  • Offered in SOIC and TSSOP
  • APPLICATIONS
    • 10-G (OC–192) Optical Modules
    • 622 MHz Central Office Clock Distribution
    • Wireless Basestations
    • Low Jitter Clock Repeater/Multiplexer
    • Protection Switching for Serial Backplanes

(1)The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

The SN65LVDS122 and SN65LVDT122 are crosspoint switches that use low voltage differential signaling (LVDS) to achieve signaling rates as high as 1.5 Gbps. They are pin-compatible speed upgrades to the SN65LVDS22 and SN65LVDM22. The internal signal paths maintain differential signaling for high speeds and low signal skews. These devices have a 0 V to 4 V common-mode input range that accepts LVDS, LVPECL, CML inputs. Two logic pins (S0 and S1) set the internal configuration between the differential inputs and outputs. This allows the flexibility to perform the following configurations: 2 x 2 crosspoint switch, 2:1 mux, 1:2 splitter or dual repeater/translator within a single device. Additionally, SN65LVDT122 incorporates a 110- termination resistor for those applications where board space is a premium. Although these devices are designed for 1.5 Gbps, some applications at a 2-Gbps data rate can be supported depending on loading and signal quality.

The intended application of this device is ideal for loopback switching for diagnostic routines, fanout buffering of clock/data distribution provide protection in fault-tolerant systems, clock muxing in optical modules, and for overall signal boosting over extended distances.

The SN65LVDS122 and SN65LVDT122 are characterized for operation from –40°C to 85°C.

The SN65LVDS122 and SN65LVDT122 are crosspoint switches that use low voltage differential signaling (LVDS) to achieve signaling rates as high as 1.5 Gbps. They are pin-compatible speed upgrades to the SN65LVDS22 and SN65LVDM22. The internal signal paths maintain differential signaling for high speeds and low signal skews. These devices have a 0 V to 4 V common-mode input range that accepts LVDS, LVPECL, CML inputs. Two logic pins (S0 and S1) set the internal configuration between the differential inputs and outputs. This allows the flexibility to perform the following configurations: 2 x 2 crosspoint switch, 2:1 mux, 1:2 splitter or dual repeater/translator within a single device. Additionally, SN65LVDT122 incorporates a 110- termination resistor for those applications where board space is a premium. Although these devices are designed for 1.5 Gbps, some applications at a 2-Gbps data rate can be supported depending on loading and signal quality.

The intended application of this device is ideal for loopback switching for diagnostic routines, fanout buffering of clock/data distribution provide protection in fault-tolerant systems, clock muxing in optical modules, and for overall signal boosting over extended distances.

The SN65LVDS122 and SN65LVDT122 are characterized for operation from –40°C to 85°C.

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Documentación técnica

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Tipo Título Fecha
* Data sheet SN65LVDS122, SN65LVDT122 - 1.5 Gbps 2 x 2 LVDS Crosspoint Switch datasheet (Rev. B) 02 jun 2004
EVM User's guide SN65LVDS122EVM User's Guide (Rev. A) 11 mar 2003

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

SN65LVDS125AEVM — SN65LVDS125 Módulo de evaluación

The SN65LVDS125A is a 4 x 4 non-blocking cross point switch. Low-Voltage differential signaling (LVDS) is used to achieve signaling rates of 1.5 Gbps per channel. Each output driver includes a 4:1 multiplexer to allow any input to be routed to any output.Internal signal paths are fully differential (...)

Guía del usuario: PDF
Modelo de simulación

SN65LVDS122 IBIS Model D PKG (Rev. A)

SLLC126A.ZIP (8 KB) - IBIS Model
Modelo de simulación

SN65LVDS122 IBIS Model PW PKG

SLLC210.ZIP (8 KB) - IBIS Model
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
Guía del usuario: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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