UCC27523
Controlador de puerta de doble canal (5 A/5 A) con UVLO de 5 V, entradas de inversión y activación
UCC27523
- Industry-standard pinout
- Two independent gate-drive channels
- 5A peak source and sink-drive current
- Independent-enable function for each output
- TTL and CMOS compatible logic threshold independent of supply voltage
- Hysteretic-logic thresholds for high noise immunity
- Inputs and enable pin-voltage levels not restricted by VDD pin bias supply voltage
- 4.5V to 18V single-supply range
- Outputs held low during VDD-UVLO, (ensures glitch-free operation at power up and power down)
- Fast propagation delays (13ns typical)
- Fast rise and fall times (7ns and 6ns typical)
- 1ns typical delay matching between two channels
- Two outputs are in parallel for higher drive current
- Outputs held low when inputs floating
- PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and 3mm × 3mm WSON-8 package options
- Operating temperature range of –40°C to 140°C
The UCC2752x family of devices are dual-channel, high-speed, low-side gate-driver devices capable of effectively driving MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC2752x can deliver high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay (typically 13ns). In addition, the drivers feature matched internal propagation delays between the two channels. These delays are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with one input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.
The UCC2752x family provides the combination of three standard logic options — dual inverting, dual noninverting, one inverting and one noninverting driver. The UCC27526 features a dual input design which offers flexibility of both inverting (IN– pin) and non-inverting (IN+ pin) configuration for each channel. Either IN+ or IN– pin controls the state of the driver output. The unused input pin is used for enable and disable functions. For safety purpose, internal pullup and pulldown resistors on the input pins of all the devices in UCC2752x family ensure that outputs are held LOW when input pins are in floating condition. The UCC27523 and UCC27525 devices feature Enable pins (ENA and ENB) to have better control of the operation of the driver applications. The pins are internally pulled up to VDD for active-high logic and are left open for standard operation.
The UCC2752x family of devices are available in SOIC-8 (D), MSOP-8 with exposed pad (DGN) and 3mm × 3mm WSON-8 with exposed pad (DSD) packages. The UCC27526 is only offered in a 3mm × 3mm WSON (DSD) package.
Documentación técnica
Tipo | Título | Fecha | ||
---|---|---|---|---|
* | Data sheet | UCC2752x Dual 5A High-Speed, Low-Side Gate Drivers datasheet (Rev. H) | PDF | HTML | 14 jun 2024 |
Application note | Why use a Gate Drive Transformer? | PDF | HTML | 04 mar 2024 | |
Application brief | External Gate Resistor Selection Guide (Rev. A) | 28 feb 2020 | ||
Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 28 feb 2020 | ||
Application note | Improving Efficiency of DC-DC Conversion through Layout | 07 may 2019 | ||
More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 29 oct 2018 | ||
Selection guide | Power Management Guide 2018 (Rev. R) | 25 jun 2018 | ||
Application brief | Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole | 16 mar 2018 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
UCC27423-4-5-Q1EVM — Módulo de evaluación (EVM) UCC2742xQ1 de controladores MOSFET dobles de lado bajo, alta velocidad y
PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI
Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
---|---|---|
HVSSOP (DGN) | 8 | Ultra Librarian |
SOIC (D) | 8 | Ultra Librarian |
WSON (DSD) | 8 | Ultra Librarian |
Pedidos y calidad
- RoHS
- REACH
- Marcado del dispositivo
- Acabado de plomo/material de la bola
- Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
- Resumen de calificaciones
- Monitoreo continuo de confiabilidad
- Lugar de fabricación
- Lugar de ensamblaje
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