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TCA9406

ACTIVO

Traductor bidireccional de nivel de tensión de 1 MHz I2C/SMBus de 2 bits con resistores de subida in

Detalles del producto

Features Enable pin Protocols I2C Frequency (max) (MHz) 1 VCCA (min) (V) 1.65 VCCA (max) (V) 3.6 VCCB (min) (V) 2.3 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (°C) -40 to 85
Features Enable pin Protocols I2C Frequency (max) (MHz) 1 VCCA (min) (V) 1.65 VCCA (max) (V) 3.6 VCCB (min) (V) 2.3 VCCB (max) (V) 5.5 Supply restrictions VCCA <= VCCB Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZP) 8 2.8125 mm² 2.25 x 1.25 SSOP (DCT) 8 11.8 mm² 2.95 x 4 VSSOP (DCU) 8 6.2 mm² 2 x 3.1
  • 2-Bit Bidirectional Translator for SDA and SCL Lines in I2C Applications
  • Provides Bidirectional Voltage Translation With No Direction Pin
  • High-Impedance Output SCL_A, SDA_A, SCL_B, SDA_B Pins When OE = Low or VCC = 0 V
  • Internal 10-kΩ Pullup Resistor on All SDA and SCL Pins
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • VCC Isolation Feature: If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required: Either VCCA or VCCB Can Be Ramped First
  • Low Ioff of 2 µA When Either VCCA or VCCB = 0 V
  • OE Input Can Be Tied Directly to VCCA Or Controlled By GPIO
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B Port
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
  • 2-Bit Bidirectional Translator for SDA and SCL Lines in I2C Applications
  • Provides Bidirectional Voltage Translation With No Direction Pin
  • High-Impedance Output SCL_A, SDA_A, SCL_B, SDA_B Pins When OE = Low or VCC = 0 V
  • Internal 10-kΩ Pullup Resistor on All SDA and SCL Pins
  • 1.65 V to 3.6 V on A port and 2.3 V to 5.5 V on B port (VCCA  ≤ VCCB)
  • VCC Isolation Feature: If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State
  • No Power-Supply Sequencing Required: Either VCCA or VCCB Can Be Ramped First
  • Low Ioff of 2 µA When Either VCCA or VCCB = 0 V
  • OE Input Can Be Tied Directly to VCCA Or Controlled By GPIO
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • A Port
      • 2500-V Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)
    • B Port
      • 8-kV Human-Body Model (A114-B)
      • 250-V Machine Model (A115-A)
      • 1500-V Charged-Device Model (C101)

The TCA9406 is a 2-bit bidirectional I2C and SMBus voltage-level translator with an output enable (OE) input. It is operational from 1.65 V to 3.6 V on the A-side, referenced toVCCA, and from 2.3 V to 5.5 V on the B-side, referenced to VCCB. This allows the device to interface between lower and higher logic signal levels at any of the typical 1.8-V, 2.5-V, 3.3-V, and
5-V supply rails.

The OE input pin is referenced to VCCA, can be tied directly to VCCA, but it is also 5.5-V tolerant. The OE pin can also be controlled and set to a logic low to place all the SCL and SDA pins in a high-impedance state, which significantly reduces the quiescent current consumption.

Under normal I2C and SMBus operation or other open-drain configurations, the TCA9406 can support up to 2 Mbps; therefore, it is compatible with standard I2C speeds where the frequency of SCL is 100 kHz (Standard-mode), 400 kHz (Fast-mode), or 1 MHz (Fast-mode Plus). The device can also be used as a general purpose level translator, and when the A- and B-side ports are both driven with push-pull devices the TCA9406 can support up to 24 Mbps.

The TCA9406 features internal 10-kΩ pullup resistors on SCL_A, SDA_A, SCL_B, and SDA_B. Additional external pullup resistors can be added to the bus to reduce the total pullup resistance and speed up rising edges.

The TCA9406 is a 2-bit bidirectional I2C and SMBus voltage-level translator with an output enable (OE) input. It is operational from 1.65 V to 3.6 V on the A-side, referenced toVCCA, and from 2.3 V to 5.5 V on the B-side, referenced to VCCB. This allows the device to interface between lower and higher logic signal levels at any of the typical 1.8-V, 2.5-V, 3.3-V, and
5-V supply rails.

The OE input pin is referenced to VCCA, can be tied directly to VCCA, but it is also 5.5-V tolerant. The OE pin can also be controlled and set to a logic low to place all the SCL and SDA pins in a high-impedance state, which significantly reduces the quiescent current consumption.

Under normal I2C and SMBus operation or other open-drain configurations, the TCA9406 can support up to 2 Mbps; therefore, it is compatible with standard I2C speeds where the frequency of SCL is 100 kHz (Standard-mode), 400 kHz (Fast-mode), or 1 MHz (Fast-mode Plus). The device can also be used as a general purpose level translator, and when the A- and B-side ports are both driven with push-pull devices the TCA9406 can support up to 24 Mbps.

The TCA9406 features internal 10-kΩ pullup resistors on SCL_A, SDA_A, SCL_B, and SDA_B. Additional external pullup resistors can be added to the bus to reduce the total pullup resistance and speed up rising edges.

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Documentación técnica

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Tipo Título Fecha
* Data sheet TCA9406 2-Bit Bidirectional 1-MHz, I2C Bus and SMBus Voltage-Level Translator With 8-kV HBM ESD datasheet (Rev. G) PDF | HTML 29 nov 2018
Application note Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A) PDF | HTML 03 jul 2024
EVM User's guide TCA9406 I2C Translator Evaluation Module 26 oct 2018
Application note Understanding the I2C Bus PDF | HTML 30 jun 2015
Application note Maximum Clock Frequency of I2C Bus Using Repeaters 15 may 2015
Application note I2C Bus Pull-Up Resistor Calculation PDF | HTML 13 feb 2015

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

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Placa de evaluación

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Guía del usuario: PDF
Herramienta de diseño

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Herramienta de simulación

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Herramienta de simulación

TINA-TI — Programa de simulación analógica basado en SPICE

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Guía del usuario: PDF
Diseños de referencia

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Design guide: PDF
Esquema: PDF
Diseños de referencia

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Test report: PDF
Esquema: PDF
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
DSBGA (YZP) 8 Ultra Librarian
SSOP (DCT) 8 Ultra Librarian
VSSOP (DCU) 8 Ultra Librarian

Pedidos y calidad

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  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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