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TPS22964C

現行

具輸出放電的 5.5-V、3-A、14-mΩ 負載開關

產品詳細資料

Number of channels 1 Vin (min) (V) 1 Vin (max) (V) 5.5 Imax (A) 3 Ron (typ) (mΩ) 13.8 Shutdown current (ISD) (typ) (µA) 0.76 Quiescent current (Iq) (typ) (µA) 38 Soft start Fixed Rise Time Current limit type None Features Quick output discharge, Reverse current protection Rating Catalog Operating temperature range (°C) -40 to 85 FET Internal Device type Load switches Function Inrush current control, Reverse current blocking
Number of channels 1 Vin (min) (V) 1 Vin (max) (V) 5.5 Imax (A) 3 Ron (typ) (mΩ) 13.8 Shutdown current (ISD) (typ) (µA) 0.76 Quiescent current (Iq) (typ) (µA) 38 Soft start Fixed Rise Time Current limit type None Features Quick output discharge, Reverse current protection Rating Catalog Operating temperature range (°C) -40 to 85 FET Internal Device type Load switches Function Inrush current control, Reverse current blocking
DSBGA (YZP) 6 2.1875 mm² 1.75 x 1.25
  • Integrated N-Channel Load Switch
  • Input Voltage Range: 1 V to 5.5 V
  • Internal Pass-FET RDSON = 8 mΩ (Typ)
  • Ultra-Low ON-Resistance
    • RON = 13 mΩ (Typ) at VIN = 5 V
    • RON = 14 mΩ (Typ) at VIN = 3.3 V
    • RON = 18 mΩ (Typ) at VIN = 1.8 V
  • 3A Maximum Continuous Switch Current
  • Reverse Current Protection (When Disabled)
  • Low Shutdown Current (760 nA)
  • Low Threshold 1.3-V GPIO Control Input
  • Controlled Slew-Rate to Avoid Inrush Current
  • Quick Output Discharge (TPS22964 only)
  • Six Terminal Wafer-Chip-Scale Package (Nominal Dimensions Shown - See Addendum for Details)
    • 0.9 mm x 1.4 mm, 0.5 mm Pitch, 0.5 mm Height (YZP)
  • ESD Performance Tested Per JESD 22
    • 2-kV Human-Body Model (A114-B, Class II)
    • 500-V Charged-Device Model (C101)
  • Integrated N-Channel Load Switch
  • Input Voltage Range: 1 V to 5.5 V
  • Internal Pass-FET RDSON = 8 mΩ (Typ)
  • Ultra-Low ON-Resistance
    • RON = 13 mΩ (Typ) at VIN = 5 V
    • RON = 14 mΩ (Typ) at VIN = 3.3 V
    • RON = 18 mΩ (Typ) at VIN = 1.8 V
  • 3A Maximum Continuous Switch Current
  • Reverse Current Protection (When Disabled)
  • Low Shutdown Current (760 nA)
  • Low Threshold 1.3-V GPIO Control Input
  • Controlled Slew-Rate to Avoid Inrush Current
  • Quick Output Discharge (TPS22964 only)
  • Six Terminal Wafer-Chip-Scale Package (Nominal Dimensions Shown - See Addendum for Details)
    • 0.9 mm x 1.4 mm, 0.5 mm Pitch, 0.5 mm Height (YZP)
  • ESD Performance Tested Per JESD 22
    • 2-kV Human-Body Model (A114-B, Class II)
    • 500-V Charged-Device Model (C101)

The TPS22963/64 is a small, ultra-low RON load switch with controlled turn on. The device contains a low RDSON N-Channel MOSFET that can operate over an input voltage range of 1 V to 5.5 V and switch currents of up to 3 A. An integrated charge pump biases the NMOS switch in order to achieve a low switch ON-Resistance. The switch is controlled by an on/off input (ON), which is capable of interfacing directly with low-voltage GPIO control signals. The rise time of the TPS22963/64 device is internally controlled in order to avoid inrush current.

The TPS22963/64 provides reverse current protection. When the power switch is disabled, the device will not allow the flow of current towards the input side of the switch. The reverse current protection feature is active only when the device is disabled so as to allow for intentional reverse current (when the switch is enabled) for some applications.

The TPS22963/64 is available in a small, space-saving 6-pin WCSP package and is characterized for operation over the free air temperature range of –40°C to 85°C.

The TPS22963/64 is a small, ultra-low RON load switch with controlled turn on. The device contains a low RDSON N-Channel MOSFET that can operate over an input voltage range of 1 V to 5.5 V and switch currents of up to 3 A. An integrated charge pump biases the NMOS switch in order to achieve a low switch ON-Resistance. The switch is controlled by an on/off input (ON), which is capable of interfacing directly with low-voltage GPIO control signals. The rise time of the TPS22963/64 device is internally controlled in order to avoid inrush current.

The TPS22963/64 provides reverse current protection. When the power switch is disabled, the device will not allow the flow of current towards the input side of the switch. The reverse current protection feature is active only when the device is disabled so as to allow for intentional reverse current (when the switch is enabled) for some applications.

The TPS22963/64 is available in a small, space-saving 6-pin WCSP package and is characterized for operation over the free air temperature range of –40°C to 85°C.

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技術文件

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類型 標題 日期
* Data sheet TPS2296xC 5.5-V, 3-A, 13-mΩ On-Resistance Load Switch With Reverse Current Protection and Controlled Turn-On datasheet (Rev. A) PDF | HTML 2015年 1月 14日
Technical article How innovative packaging can drive higher power density in load switches PDF | HTML 2022年 2月 23日
Application note Load Switch Thermal Considerations (Rev. A) 2018年 10月 11日
Application note Basics of Load Switches (Rev. A) 2018年 9月 5日
Application note Selecting a Load Switch to Replace a Discrete Solution 2017年 4月 30日
Application note Timing of Load Switches 2017年 4月 27日
Application note Reverse Current Protection in Load Switches 2016年 5月 19日
Application note Managing Inrush Current (Rev. A) 2015年 5月 28日
EVM User's guide Using the TPS22963/64EVM-029 Single Channel Load Switch IC (Rev. A) 2013年 6月 26日

設計與開發

如需其他條款或必要資源,請按一下下方的任何標題以檢視詳細頁面 (如有)。

開發板

TPS22964CEVM-029 — TPS22964C 負載開關評估模組

The Texas Instruments TPS22964CEVM-029 evaluation module (EVM) helps designers evaluate the performance of the TPS22964C low on-resistance, 3-A load switch in the ultra-small CSP-6 package. The EVM allows the designer to apply an input voltage (1.1 V-5.5 V) under different loading conditions (0-3 (...)

使用指南: PDF
TI.com 無法提供
模擬型號

TPS22964C TINA-TI Reference Design

SLVMAR5.TSC (107 KB) - TINA-TI Reference Design
模擬型號

TPS22964C TINA-TI Transient Spice Model

SLVMAR6.ZIP (17 KB) - TINA-TI Spice Model
模擬型號

TPS22964C Unencrypted PSpice Transient Model Package (Rev. A)

SLVM832A.ZIP (41 KB) - PSpice Model
模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
參考設計

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This reference design is a fully functional development board powering an NXP™ i.MX 6ULL application processor from a TPS6521815 PMIC. The hardware design consists of DDR3L SDRAM (512 MB), 32-MB Serial NOR Flash, 8-GB eMMC 5.0 iNAND, SD Card interface v3.0, dual-channel 100Base-T Ethernet, (...)
Design guide: PDF
電路圖: PDF
參考設計

TIDA-00399 — SSD 電力傳輸參考設計

The TIDA-00399 design implements a complete power delivery solution for an SSD in the M.2 form factor. The TPS22954 load switch is used to limit inrush current and eliminate the need for a separate supervisor circuit on the system input. This design is tested and includes GUI, demo, and User's (...)
Design guide: PDF
電路圖: PDF
封裝 針腳 CAD 符號、佔位空間與 3D 模型
DSBGA (YZP) 6 Ultra Librarian

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  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
  • 晶圓廠位置
  • 組裝地點

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