TPS40200
Controlador CC/CC reductor no síncrono de entrada amplia
TPS40200
- Input Voltage Range 4.5 V to 52 V
- Output Voltage (700 mV to 90% VIN)
- 200-mA Internal P-channel FET Driver
- Voltage Feed-Forward Compensation
- Undervoltage Lockout
- Programmable Fixed-Frequency (between 35 kHz
and 500 kHz) Operation - Programmable Short-Circuit Protection
- Hiccup Overcurrent Fault Recovery
- Programmable Closed-Loop Soft-Start
- 700 mV 1% Reference Voltage
- External Synchronization
- Small 8-Pin SOIC (D) and VSON (DRB) Packages
The TPS40200 is a flexible, non-synchronous controller with a built-in 200-mA driver for P-channel FETs. The circuit operates with inputs up to 52 V with a power-saving feature that turns off driver current once the external FET has been fully turned on. This feature extends the flexibility of the device, allowing it to operate with an input voltage up to 52 V without dissipating excessive power. The circuit operates with voltage-mode feedback and has feed-forward input voltage compensation that responds instantly to input voltage change. The integral 700-mV reference is trimmed to 2%, providing the means to accurately control low voltages. The TPS40200 is available in an 8-pin SOIC and an 8-pin VSON package and supports many of the features of more complex controllers. Clock frequency, soft-start, and overcurrent limits are each easily programmed by a single, external component. The part has undervoltage lockout, and can be easily synchronized to other controllers or a system clock to satisfy sequencing and/or noise-reduction requirements.
Documentación técnica
Tipo | Título | Fecha | ||
---|---|---|---|---|
* | Data sheet | TPS40200 Wide Input Range Non-Synchronous Voltage Mode Controller datasheet (Rev. G) | PDF | HTML | 01 dic 2014 |
Selection guide | Power Management Guide 2018 (Rev. R) | 25 jun 2018 | ||
Application note | Automated Frequency Response Analyzer | 09 oct 2013 | ||
Analog Design Journal | 3Q 2010 Issue Analog Applications Journal | 11 ago 2010 | ||
EVM User's guide | Using the TPS40200EVM-002 with a 24V Input (Rev. B) | 07 abr 2009 | ||
More literature | TPS40200D Test Report | 15 feb 2008 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
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Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
---|---|---|
SOIC (D) | 8 | Ultra Librarian |
VSON (DRB) | 8 | Ultra Librarian |
Pedidos y calidad
- RoHS
- REACH
- Marcado del dispositivo
- Acabado de plomo/material de la bola
- Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
- Resumen de calificaciones
- Monitoreo continuo de confiabilidad
- Lugar de fabricación
- Lugar de ensamblaje
Soporte y capacitación
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