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UCC27211A
Controlador de puerta de medio puente de 4 A y 120 V con UVLO de 8 V y manipulación de tensión negat
Hoja de datos
UCC27211A
- –40°C to +150°C junction temperature range
- Drives two N-channel MOSFETs in high-side and low-side configuration with independent inputs
- Maximum boot voltage 120V DC
- 3.7A source, 4.5A sink output currents
- Input pins can tolerate –10V to +20V and are independent of supply voltage range
- TTL compatible inputs
- 8V to 17V VDD operating range, (20V ABS MAX)
- 7.2ns rise and 5.5ns fall time with 1000pF load
- Fast propagation delay times (20ns typical)
- 4ns delay matching
- Symmetrical undervoltage lockout for high-side and low-side driver
- Industry standard package available
- 4mm × 4mm SON-8
The UCC27211A device driver is based on the popular UCC27201 MOSFET drivers; but, this device offers several significant performance improvements.
The peak output pullup and pulldown current has been increased to 3.7A source and 4.5A sink and thereby allows for driving large power MOSFETs with minimized switching losses during the transition through the Miller Plateau of the MOSFET. The input structure can directly handle –10VDC, which increases robustness and also allows direct interface to gate-drive transformers without using rectification diodes. The inputs are also independent of supply voltage and have a 20V maximum rating.
The switching node of the UCC27211A (HS pin) can handle –(24 - VDD) V maximum, which allows the high-side channel to be protected from inherent negative voltages caused by parasitic inductance and stray capacitance. The UCC27211A (TTL inputs) has increased hysteresis that allows for interface to analog or digital PWM controllers with enhanced noise immunity.
The low-side and high-side gate drivers are independently controlled and matched to 4ns between the turn on and turn off of each other. An on-chip 120V rated bootstrap diode eliminates the external discrete diodes. Undervoltage lockout is provided for both the high-side and the low-side drivers which provides symmetric turn on and turn off behavior and forces the outputs low if the drive voltage is below the specified threshold.
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Documentación técnica
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Ver todo 9 | Tipo | Título | Fecha | ||
|---|---|---|---|---|
| * | Data sheet | UCC27211A 120V, 3.7A/4.5A Half-Bridge Driver with 8V UVLO datasheet (Rev. D) | PDF | HTML | 18 jul 2024 |
| Application note | Challenges and Solutions for Half-Bridge Gate Drivers in Bidirectional DC-DC Converters | PDF | HTML | 24 ene 2024 | |
| Technical article | For efficiencies’ sake – how to integrate bidirectional power flow into your UPS design (part 1) | PDF | HTML | 11 ene 2024 | |
| Application note | Understanding and comparing peak current capability of gate drivers | PDF | HTML | 30 mar 2021 | |
| Application brief | External Gate Resistor Selection Guide (Rev. A) | 28 feb 2020 | ||
| Application brief | Understanding Peak IOH and IOL Currents (Rev. A) | 28 feb 2020 | ||
| White paper | Power Electronics in Motor Drives: Where is it? (Rev. A) | 01 oct 2019 | ||
| More literature | Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) | 29 oct 2018 | ||
| Technical article | How to achieve higher system efficiency- part one: high-current gate drivers | PDF | HTML | 16 nov 2016 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
Modelo de simulación
UCC27211 TINA-TI Transient Reference Design
SLUM304.TSC (107 KB) - TINA-TI Reference Design
Modelo de simulación
UCC27211 TINA-TI Transient Spice Model
SLUM305.ZIP (9 KB) - TINA-TI Spice Model
Herramienta de simulación
PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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| Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
|---|---|---|
| VSON (DRM) | 8 | Ultra Librarian |
Pedidos y calidad
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- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
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