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TPL7407LA-Q1

ACTIVO

Controlador de lado bajo de matriz NMOS de 30 V y 7 canales para automoción

Detalles del producto

Drivers per package 7 Switching voltage (max) (V) 32 Output voltage (max) (V) 30 Peak output current (A) 0.5 Delay time (typ) (ns) 250 Input compatibility CMOS, TTL Vol at lowest spec current (typ) (mV) 210 Iout/ch (max) (mA) 600 Iout_off (typ) (µA) 0.01 Rating Automotive Operating temperature range (°C) -40 to 125 FET Internal Imax (A) 0.6 Device type Low-side switches Function Automotive load dump compatibility, Inductive load compatibility
Drivers per package 7 Switching voltage (max) (V) 32 Output voltage (max) (V) 30 Peak output current (A) 0.5 Delay time (typ) (ns) 250 Input compatibility CMOS, TTL Vol at lowest spec current (typ) (mV) 210 Iout/ch (max) (mA) 600 Iout_off (typ) (µA) 0.01 Rating Automotive Operating temperature range (°C) -40 to 125 FET Internal Imax (A) 0.6 Device type Low-side switches Function Automotive load dump compatibility, Inductive load compatibility
TSSOP (PW) 16 32 mm² 5 x 6.4
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • 600-mA Rated Drain Current (Per Channel)
  • CMOS Pin-to-Pin Improvement of 7-channel Darlington Array (For Example: ULN2003A)
  • Power Efficient (Very low VOL)
    • Less Than 4 Times Lower VOL at 100 mA Than Darlington Array
  • Very Low Output Leakage < 10 nA Per Channel
  • High-Voltage Outputs 30 V
  • Compatible with 1.8-V to 5-V Microcontroller and Logic Interface
  • Internal Free-wheeling Diodes for Inductive Kick-back Protection
  • Input Pull-down Resistors Allows Tri-stating the Input Driver
  • Input RC-Snubber to Eliminate Spurious Operation in Noisy Environment
  • ESD Protection Exceeds JESD 22
    • 2-kV HBM, 500-V CDM
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • 600-mA Rated Drain Current (Per Channel)
  • CMOS Pin-to-Pin Improvement of 7-channel Darlington Array (For Example: ULN2003A)
  • Power Efficient (Very low VOL)
    • Less Than 4 Times Lower VOL at 100 mA Than Darlington Array
  • Very Low Output Leakage < 10 nA Per Channel
  • High-Voltage Outputs 30 V
  • Compatible with 1.8-V to 5-V Microcontroller and Logic Interface
  • Internal Free-wheeling Diodes for Inductive Kick-back Protection
  • Input Pull-down Resistors Allows Tri-stating the Input Driver
  • Input RC-Snubber to Eliminate Spurious Operation in Noisy Environment
  • ESD Protection Exceeds JESD 22
    • 2-kV HBM, 500-V CDM

The TPL7407LA-Q1 is a high-voltage, high-current NMOS transistor array. This device consists of seven NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. New regulation and drive circuitry added to give maximum drive strength across all GPIO ranges (1.8 V–5 V).The transistors can be paralleled for higher current capability.

The TPL7407LA-Q1 key benefit is its improved power efficiency and lower leakage than a Bipolar Darlington Implementation. With the lower VOL the user is dissipating less than half the power than traditional relay drivers with currents less than 250 mA per channel.

The TPL7407LA-Q1 is a high-voltage, high-current NMOS transistor array. This device consists of seven NMOS transistors that feature high-voltage outputs with common-cathode clamp diodes for switching inductive loads. The maximum drain-current rating of a single NMOS channel is 600 mA. New regulation and drive circuitry added to give maximum drive strength across all GPIO ranges (1.8 V–5 V).The transistors can be paralleled for higher current capability.

The TPL7407LA-Q1 key benefit is its improved power efficiency and lower leakage than a Bipolar Darlington Implementation. With the lower VOL the user is dissipating less than half the power than traditional relay drivers with currents less than 250 mA per channel.

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Documentación técnica

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* Data sheet TPL7407LA-Q1 30-V 7-Channel Low Side Driver datasheet PDF | HTML 01 feb 2018

Diseño y desarrollo

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Placa de evaluación

TPL7407LEVM — Módulo de evaluación TPL7407L de controlador de lado bajo de 40 V

The TPL7407LEVM is 7-channel relay and inductive load sink driver evaluation module that demonstrates the integrated circuit TPL7407LDR. The TPL7407LDR is a high-performance peripheral driver designed to drive loads of many types including relays, stepper motors, lamps, and light emitting diodes. (...)

Guía del usuario: PDF
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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TSSOP (PW) 16 Ultra Librarian

Pedidos y calidad

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  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
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  • Lugar de fabricación
  • Lugar de ensamblaje

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