Another factor contributing to ADC conversion latency is ADC overhead time. This time accounts for any internal ADC functions required to process the converted data before the ADC indicates that a new conversion result is ready. ADC overhead time is defined by the ADC design and therefore cannot be changed by the user.

Unlike programmable delay time, the ADC overhead time is required each time settled data becomes available. However, the conversion process starts as the ADC overhead time begins such that the ADC overhead time only adds to conversion latency during the first conversion. Figure 5-4 highlights the ADC overhead time in red and shows when it occurs during each conversion period for the ADS124S08 low-latency filter in continuous-conversion mode.

Figure 5-4 ADC Overhead Time Using the ADS124S08 Low-Latency Filter in Continuous-Conversion Mode

Importantly, Figure 5-4 confirms that the ADC overhead time only contributes to the conversion latency during the first conversion. Second and subsequent conversion results must accommodate the ADC overhead time, but the conversion process begins simultaneously with the ADC overhead such that the overall conversion latency is equal to 1 / ODR.

Higher-order filters follow a similar pattern. Figure 5-5 highlights the ADC overhead time in red and shows when it occurs during the conversion process for the ADS124S08 sinc³ filter in continuous-conversion mode.

Figure 5-5 ADC Overhead Time Using the ADS124S08 Sinc³ Filter in Continuous-Conversion Mode

The unsettled sinc³ data in Figure 5-5 does not require the ADC overhead time because the data is not ready to be processed after the first and second conversion periods. Instead, the ADC overhead begins after the third conversion period ends, and then immediately after each second and subsequent conversion period. However, the conversion process begins concurrently with the ADC overhead time for second and subsequent data such that it does not affect the overall conversion latency. The end result is that the overhead time only affects first conversion latency when using the ADS124S08 sinc³ filter, just as it did for the low-latency filter in Figure 5-4.

One important characteristic of ADC overhead time is that it typically requires a fixed amount of ADC clock periods and therefore can be independent of ODR. This means ADC overhead time tends to use a larger percentage of the overall conversion latency as ODR increases. To verify this claim, refer to the ADS124S08 sinc³ conversion latency values in Table 5-1. As table note #3 states, there is no programmable delay included in the conversion latency. Therefore, the ADS124S08 first conversion latency values using the sinc³ filter are comprised of three conversion periods plus the ADC overhead time, as per Figure 5-5. Since a conversion period is just the time specified for a second or subsequent conversion, it is possible to calculate the ADS124S08 sinc³ filter overhead time, t_{ADC_OVERHEAD}, using Equation 14:

where

• t_MOD(FC) = the number of t_MOD periods equal to the first conversion latency
• t_MOD(SSC) = the number of t_MOD periods equal to the second or subsequent conversion latency

It is helpful to consider t_{ADC_OVERHEAD} in terms of the number of t_MOD periods because conversion latency values in milliseconds can include rounding errors that make the results less clear. However, it is possible to use conversion latency values in milliseconds if an ADC data sheet does not quantify conversion latency by the number of t_MOD periods. In this case, replace the variables in Equation 14 with their corresponding conversion latency values in milliseconds.

Table 5-4 uses Equation 14 to calculate t_{ADC_OVERHEAD} for all ODRs using the ADS124S08 sinc³ filter. Table 5-4 also calculates the percent of the total conversion latency used by t_{ADC_OVERHEAD}.

An important takeaway from Table 5-4 is that t_{ADC_OVERHEAD} is not constant across all ODRs using the ADS124S08 sinc³ filter. Instead, t_{ADC_OVERHEAD} = 65 ∙ t_MOD periods for ODR < 1000 SPS and t_{ADC_OVERHEAD} = 40 ∙ t_MOD periods for ODR ≥ 1000 SPS. This behavior results from the specific digital filter architecture, and can be different for other filters within the same ADC. Moreover, Table 5-4 confirms the claim that t_{ADC_OVERHEAD} tends to become a larger percentage of the overall conversion latency as ODR increases. In fact, t_{ADC_OVERHEAD} is almost 20% of the total conversion time when ODR = 4000 SPS, compared to just 0.02% at ODR = 2.5 SPS.

As stated previously, ADC overhead time is defined by the ADC design. This means that the ratio of the ADC overhead time to the total conversion latency is fixed for a given ADC digital filter architecture and ODR. However, a t_MOD period – and therefore the conversion latency – can be changed by modifying the ADC clock frequency.