SLLU331 March 2021 ISO6721 , ISO6721-Q1 , ISO6741 , ISO6741-Q1 , ISO7021 , ISO7041 , ISO7131CC , ISO7140CC , ISO7140FCC , ISO7141CC , ISO7141FCC , ISO7142CC , ISO7142CC-Q1 , ISO721 , ISO721-Q1 , ISO721M , ISO721M-EP , ISO722 , ISO722-Q1 , ISO7220A , ISO7220A-Q1 , ISO7220B , ISO7220C , ISO7220M , ISO7221A , ISO7221A-Q1 , ISO7221B , ISO7221C , ISO7221C-HT , ISO7221C-Q1 , ISO7221M , ISO722M , ISO7230C , ISO7230M , ISO7231C , ISO7231C-Q1 , ISO7231M , ISO7240C , ISO7240CF , ISO7240CF-Q1 , ISO7240M , ISO7241A-EP , ISO7241C , ISO7241C-Q1 , ISO7241M , ISO7242C , ISO7242C-Q1 , ISO7242M , ISO7310-Q1 , ISO7310C , ISO7310FC , ISO7320-Q1 , ISO7320C , ISO7320FC , ISO7321-Q1 , ISO7321C , ISO7321FC , ISO7330-Q1 , ISO7330C , ISO7330FC , ISO7331-Q1 , ISO7331C , ISO7331FC , ISO7340-Q1 , ISO7340C , ISO7340FC , ISO7341-Q1 , ISO7341C , ISO7341FC , ISO7342-Q1 , ISO7342C , ISO7342FC , ISO7420 , ISO7420E , ISO7420FCC , ISO7420FE , ISO7420M , ISO7421 , ISO7421-EP , ISO7421A-Q1 , ISO7421E , ISO7421E-Q1 , ISO7421FE , ISO7520C , ISO7521C , ISO7631FC , ISO7631FM , ISO7640FM , ISO7641FC , ISO7641FM , ISO7710 , ISO7710-Q1 , ISO7720 , ISO7720-Q1 , ISO7721 , ISO7721-Q1 , ISO7730 , ISO7730-Q1 , ISO7731 , ISO7731-Q1 , ISO7740 , ISO7740-Q1 , ISO7741 , ISO7741-Q1 , ISO7741E-Q1 , ISO7742 , ISO7742-Q1 , ISO7760 , ISO7760-Q1 , ISO7761 , ISO7761-Q1 , ISO7762 , ISO7762-Q1 , ISO7763 , ISO7763-Q1 , ISO7810 , ISO7820 , ISO7821 , ISO7830 , ISO7831 , ISO7840 , ISO7841 , ISO7842 , ISOW7821 , ISOW7840 , ISOW7841 , ISOW7841A-Q1 , ISOW7842 , ISOW7843 , ISOW7844
This user’s guide describes EVM operation with respect to most digital isolator devices that come in standard pin-compatible packages. The EVM can be used for evaluation of any of TI single-channel, dual-channel, triple-channel, quad-channel, or six-channels digital isolator devices in various packages: 8-pin SOIC (D), 8-pin WB SOIC (DWV), 16-pin QSOP (DBQ), 16-pin WB SOIC (DW), and 16-pin ultra WB SOIC (DWW). This guide also describes the standard pin configurations of devices for each package, bill of materials, EVM schematic, PCB layout, and typical laboratory test setup. A typical input and output waveform is also presented.