UCC27282-Q1
Halbbrückentreiber für die Automobilindustrie, 3 A, 120 V, mit 5-V-UVLO, Verriegelung und Aktivierun
UCC27282-Q1
- AEC-Q100 qualified with following results
- Temperature grade 1 (Tj = –40°C to 150°C)
- HBM ESD classification level 1B
- CDM ESD classification level C3
- Drives two N-channel MOSFETs in high-side low-side configuration
- 5-V typical under voltage lockout
- Input interlock
- Enable/disable functionality in DRC package
- 16-ns typical propagation delay
- 12-ns rise, 10-ns fall time with 1.8-nF load
- 1-ns typical delay matching
- Absolute Maximum Negative Voltage Handling on Inputs (–5 V)
- Absolute Maximum Negative Voltage Handling on HS (–14 V)
- ±3-A peak output current
- Absolute maximum boot voltage 120 V
- Low current (7-µA) consumption when disabled
- Integrated bootstrap diode
- Functional Safety-Capable
The UCC27282 -Q1 is a robust N-channel MOSFET driver with a maximum switch node (HS) voltage rating of 100 V. It allows for two N-channel MOSFETs to be controlled in half-bridge or synchronous buck configuration based topologies. Its 3-A peak source and sink current along with low pull-up and pull-down resistance allows the UCC27282 -Q1 to drive large power MOSFETs with minimum switching losses during the transition of the MOSFET Miller plateau. Since the inputs are independent of the supply voltage, UCC27282 -Q1 can be used in conjunction with both analog and digital controllers.
The input pins as well as the HS pin are able to tolerate significant negative voltage, which improves system robustness. Input interlock further improves robustness and system reliability in high noise applications. The enable and disable functionality provides additional system flexibility by reducing power consumption by the driver and responds to fault events within the system. 5-V UVLO allows systems to operate at lower bias voltages, which is necessary in many high frequency applications and improves system efficiency in certain operating modes. Small propagation delay and delay matching specifications minimize the dead-time requirement which further improves efficiency.
Under voltage lockout (UVLO) is provided for both the high-side and low-side driver stages forcing the outputs low if the VDD voltage is below the specified threshold. An integrated bootstrap diode eliminates the need for an external discrete diode in many applications, which saves board space and reduces system cost. UCC27282 -Q1 is offered in a small package enabling high density designs.
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Technische Dokumentation
Typ | Titel | Datum | ||
---|---|---|---|---|
* | Data sheet | UCC27282-Q1Automotive 3-A 120-V Half-Bridge Driver with Cross Conduction Protection and Low Switching Losses datasheet (Rev. D) | PDF | HTML | 10 Okt 2022 |
Application note | Challenges and Solutions for Half-Bridge Gate Drivers in Bidirectional DC-DC Converters | PDF | HTML | 24 Jan 2024 | |
Functional safety information | UCC27282-Q1 Functional Safety, FIT Rate, Failure Mode Distribution and Pin FMA (Rev. B) | PDF | HTML | 14 Nov 2022 | |
Application note | Understanding and comparing peak current capability of gate drivers | PDF | HTML | 30 Mär 2021 | |
User guide | UCC27282 Evaluation Module (Rev. A) | 06 Jan 2020 | ||
Application note | UCC27282 Improving motor drive system robustness | 11 Jan 2019 | ||
Technical article | 48V systems: Driving power MOSFETs efficiently and robustly | PDF | HTML | 08 Okt 2015 |
Design und Entwicklung
Weitere Bedingungen oder erforderliche Ressourcen enthält gegebenenfalls die Detailseite, die Sie durch Klicken auf einen der unten stehenden Titel erreichen.
UCC27282EVM-335 — UCC27282 120-V-, 3-A-, 5-V-UVLO-Highside-Lowside-Gate-Treiber – Evaluierungsmodul
PSPICE-FOR-TI — PSpice® für TI Design-und Simulationstool
Gehäuse | Pins | CAD-Symbole, Footprints und 3D-Modelle |
---|---|---|
HSOIC (DDA) | 8 | Ultra Librarian |
SOIC (D) | 8 | Ultra Librarian |
VSON (DRC) | 10 | Ultra Librarian |
Bestellen & Qualität
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- REACH
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- Werksstandort
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