Inicio Gestión de la energía Interruptores de potencia Fusibles electrónicos y controladores de intercambio en caliente

TPS2321

ACTIVO

Intercambio en caliente de canal doble de 3 V a 13 V, con activación activa alta

Detalles del producto

FET External Vin (min) (V) 3 Vin (max) (V) 13 Vabsmax_cont (V) 15 Current limit (min) (A) 0.01 Current limit (max) (A) 500 Overcurrent response Circuit breaker, current limiting Fault response Latch-off Soft start Adjustable Features Fault output, Power good signal Rating Catalog Device type eFuses and hot swap controllers Operating temperature range (°C) -40 to 85 Function Inrush current control, Power good signal Quiescent current (Iq) (typ) (A) 0.0058 Quiescent current (Iq) (max) (A) 0.008
FET External Vin (min) (V) 3 Vin (max) (V) 13 Vabsmax_cont (V) 15 Current limit (min) (A) 0.01 Current limit (max) (A) 500 Overcurrent response Circuit breaker, current limiting Fault response Latch-off Soft start Adjustable Features Fault output, Power good signal Rating Catalog Device type eFuses and hot swap controllers Operating temperature range (°C) -40 to 85 Function Inrush current control, Power good signal Quiescent current (Iq) (typ) (A) 0.0058 Quiescent current (Iq) (max) (A) 0.008
SOIC (D) 16 59.4 mm² 9.9 x 6 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Dual-Channel High-Side MOSFET Drivers
  • IN1: 3 V to 13 V; IN2: 3 V to 5.5 V
  • Output dV/dt Control Limits Inrush Current
  • Independent Circuit-Breaker With Programmable
    Overcurrent Threshold and Transient Timer
  • CMOS- and TTL-Compatible Enable Input
  • Low, 5-µA Standby Supply Current (Max)
  • Available in 16-Pin SOIC and TSSOP Package
  • –40°C to 85°C Ambient Temperature Range
  • Electrostatic Discharge Protection
  • Dual-Channel High-Side MOSFET Drivers
  • IN1: 3 V to 13 V; IN2: 3 V to 5.5 V
  • Output dV/dt Control Limits Inrush Current
  • Independent Circuit-Breaker With Programmable
    Overcurrent Threshold and Transient Timer
  • CMOS- and TTL-Compatible Enable Input
  • Low, 5-µA Standby Supply Current (Max)
  • Available in 16-Pin SOIC and TSSOP Package
  • –40°C to 85°C Ambient Temperature Range
  • Electrostatic Discharge Protection

The TPS2320 and TPS2321 are dual-channel hot-swap controllers that use external N-channel MOSFETs as high-side switches in power applications. Features of these devices, such as overcurrent protection (OCP), inrush-current control, and the ability to discriminate between load transients and faults, are critical requirements for hot-swap applications.

The TPS2320/21 devices incorporate undervoltage lockout (UVLO) to ensure the device is off at startup. Each internal charge pump, capable of driving multiple MOSFETs, provides enough gate-drive voltage to fully enhance the N-channel MOSFETs. The charge pumps control both the rise times and fall times (dv/dt) of the MOSFETs, reducing power transients during power up/down. The circuit-breaker functionality combines the ability to sense overcurrent conditions with a timer function; this allows designs such as DSPs, that may have high peak currents during power-state transitions, to disregard transients for a programmable period.

DISCH1, DISCH2 – DISCH1 and DISCH2 should be connected to the sources of the external N-channel MOSFET transistors connected to GATE1 and GATE2, respectively. These pins discharge the loads when the MOSFET transistors are disabled. They also serve as reference-voltage connections for internal gate voltage-clamp circuitry.

ENABLE or ENABLE – ENABLE for TPS2320 is active low. ENABLE for TPS2321 is active high. When the controller is enabled, both GATE1 and GATE2 voltages will power up to turn on the external MOSFETs. When the ENABLE pin is pulled high for TPS2320 or the ENABLE pin is pulled low for TPS2321 for more than 50 µs, the gate of the MOSFET is discharged at a controlled rate by a current source, and a transistor is enabled to discharge the output bulk capacitance. In addition, the device turns on the internal regulator PREREG (see VREG) when enabled and shuts down PREREG when disabled so that total supply current is much less than 5µA.

FAULT – FAULT is an open-drain overcurrent flag output. When an overcurrent condition in either channel is sustained long enough to charge TIMER to 0.5 V, the overcurrent channel latches off and pulls FAULT low. The other channel will run normally if not in overcurrent. In order to turn the channel back on, either the enable pin has to be toggled or the input power has to be cycled.

GATE1, GATE2 – GATE1 and GATE2 connect to the gates of external N-channel MOSFET transistors. When the device is enabled, internal charge-pump circuitry pulls these pins up by sourcing approximately 15µA to each. The turnon slew rates depend upon the capacitance present at the GATE1 and GATE2 terminals. If desired, the turnon slew rates can be further reduced by connecting capacitors between these pins and ground. These capacitors also reduce inrush current and protect the device from false overcurrent triggering during power up. The charge-pump circuitry will generate gate-to-source voltages of 9 V-12 V across the external MOSFET transistors.

IN1, IN2 – IN1 and IN2 should be connected to the power sources driving the external N-channel MOSFET transistors connected to GATE1 and GATE2, respectively. The TPS2320/TPS2321 draws its operating current from IN1, and both channels will remain disabled until the IN1 power supply has been established. The IN1 channel has been constructed to support 3-V, 5-V, or 12-V operation, while the IN2 channel has been constructed to support 3-V or 5-V operation

ISENSE1, ISENSE2, ISET1, ISET2 – ISENSE1 and ISENSE2, in combination with ISET1 and ISET2, implement overcurrent sensing for GATE1 and GATE2. ISET1 and ISET2 set the magnitude of the current that generates an overcurrent fault, through external resistors connected to ISET1 and ISET2. An internal current source draws 50 µA from ISET1 and ISET2. With a sense resistor from IN1 to ISENSE1 or from IN2 to ISENSE2, which is also connected to the drains of external MOSFETs, the voltage on the sense resistor reflects the load current. An overcurrent condition is assumed to exist if ISENSE1 is pulled below ISET1 or if ISENSE2 is pulled below ISET2. To ensure proper circuit breaker operation, VI(ISENSE1) and VI(ISET1) should never exceed VI(IN1). Similarly, VI(ISENSE2) and VI(ISET2) should never exceed VI(IN2).

TIMER – A capacitor on TIMER sets the time during which the power switch can be in overcurrent before turning off. When the overcurrent protection circuits sense an excessive current, a current source is enabled which charges the capacitor on TIMER. Once the voltage on TIMER reaches approximately 0.5 V, the circuit-breaker latch is set and the power switch is latched off. Power must be recycled or the ENABLE pin must be toggled to restart the controller. In high-power or high-temperature applications, a minimum 50-pF capacitor is strongly recommended from TIMER to ground, to prevent any false triggering.

VREG – VREG is the output of an internal low-dropout voltage regulator, where IN1 is the input. The regulator is used to generate a regulated voltage source, less than 5.5 V, for the device. A 0.1-μF ceramic capacitor should be connected between VREG and ground to aid in noise rejection. In this configuration, upon disabling the device, the internal low-dropout regulator will also be disabled, which removes power from the internal circuitry and allows the device to be placed in low-quiescent-current mode. In applications where IN1 is less than5.5 V, VREG and IN1 may be connected together. However, under these conditions, disabling the device will not place the device in low-quiescent-current mode, because the internal low-dropout voltage regulator is being bypassed, thereby keeping internal circuitry operational. If VREG and IN1 are connected together, a 0.1-µF ceramic capacitor between VREG and ground is not needed if IN1 already has a bypass capacitor of 1µF to 10µF.

The TPS2320 and TPS2321 are dual-channel hot-swap controllers that use external N-channel MOSFETs as high-side switches in power applications. Features of these devices, such as overcurrent protection (OCP), inrush-current control, and the ability to discriminate between load transients and faults, are critical requirements for hot-swap applications.

The TPS2320/21 devices incorporate undervoltage lockout (UVLO) to ensure the device is off at startup. Each internal charge pump, capable of driving multiple MOSFETs, provides enough gate-drive voltage to fully enhance the N-channel MOSFETs. The charge pumps control both the rise times and fall times (dv/dt) of the MOSFETs, reducing power transients during power up/down. The circuit-breaker functionality combines the ability to sense overcurrent conditions with a timer function; this allows designs such as DSPs, that may have high peak currents during power-state transitions, to disregard transients for a programmable period.

DISCH1, DISCH2 – DISCH1 and DISCH2 should be connected to the sources of the external N-channel MOSFET transistors connected to GATE1 and GATE2, respectively. These pins discharge the loads when the MOSFET transistors are disabled. They also serve as reference-voltage connections for internal gate voltage-clamp circuitry.

ENABLE or ENABLE – ENABLE for TPS2320 is active low. ENABLE for TPS2321 is active high. When the controller is enabled, both GATE1 and GATE2 voltages will power up to turn on the external MOSFETs. When the ENABLE pin is pulled high for TPS2320 or the ENABLE pin is pulled low for TPS2321 for more than 50 µs, the gate of the MOSFET is discharged at a controlled rate by a current source, and a transistor is enabled to discharge the output bulk capacitance. In addition, the device turns on the internal regulator PREREG (see VREG) when enabled and shuts down PREREG when disabled so that total supply current is much less than 5µA.

FAULT – FAULT is an open-drain overcurrent flag output. When an overcurrent condition in either channel is sustained long enough to charge TIMER to 0.5 V, the overcurrent channel latches off and pulls FAULT low. The other channel will run normally if not in overcurrent. In order to turn the channel back on, either the enable pin has to be toggled or the input power has to be cycled.

GATE1, GATE2 – GATE1 and GATE2 connect to the gates of external N-channel MOSFET transistors. When the device is enabled, internal charge-pump circuitry pulls these pins up by sourcing approximately 15µA to each. The turnon slew rates depend upon the capacitance present at the GATE1 and GATE2 terminals. If desired, the turnon slew rates can be further reduced by connecting capacitors between these pins and ground. These capacitors also reduce inrush current and protect the device from false overcurrent triggering during power up. The charge-pump circuitry will generate gate-to-source voltages of 9 V-12 V across the external MOSFET transistors.

IN1, IN2 – IN1 and IN2 should be connected to the power sources driving the external N-channel MOSFET transistors connected to GATE1 and GATE2, respectively. The TPS2320/TPS2321 draws its operating current from IN1, and both channels will remain disabled until the IN1 power supply has been established. The IN1 channel has been constructed to support 3-V, 5-V, or 12-V operation, while the IN2 channel has been constructed to support 3-V or 5-V operation

ISENSE1, ISENSE2, ISET1, ISET2 – ISENSE1 and ISENSE2, in combination with ISET1 and ISET2, implement overcurrent sensing for GATE1 and GATE2. ISET1 and ISET2 set the magnitude of the current that generates an overcurrent fault, through external resistors connected to ISET1 and ISET2. An internal current source draws 50 µA from ISET1 and ISET2. With a sense resistor from IN1 to ISENSE1 or from IN2 to ISENSE2, which is also connected to the drains of external MOSFETs, the voltage on the sense resistor reflects the load current. An overcurrent condition is assumed to exist if ISENSE1 is pulled below ISET1 or if ISENSE2 is pulled below ISET2. To ensure proper circuit breaker operation, VI(ISENSE1) and VI(ISET1) should never exceed VI(IN1). Similarly, VI(ISENSE2) and VI(ISET2) should never exceed VI(IN2).

TIMER – A capacitor on TIMER sets the time during which the power switch can be in overcurrent before turning off. When the overcurrent protection circuits sense an excessive current, a current source is enabled which charges the capacitor on TIMER. Once the voltage on TIMER reaches approximately 0.5 V, the circuit-breaker latch is set and the power switch is latched off. Power must be recycled or the ENABLE pin must be toggled to restart the controller. In high-power or high-temperature applications, a minimum 50-pF capacitor is strongly recommended from TIMER to ground, to prevent any false triggering.

VREG – VREG is the output of an internal low-dropout voltage regulator, where IN1 is the input. The regulator is used to generate a regulated voltage source, less than 5.5 V, for the device. A 0.1-μF ceramic capacitor should be connected between VREG and ground to aid in noise rejection. In this configuration, upon disabling the device, the internal low-dropout regulator will also be disabled, which removes power from the internal circuitry and allows the device to be placed in low-quiescent-current mode. In applications where IN1 is less than5.5 V, VREG and IN1 may be connected together. However, under these conditions, disabling the device will not place the device in low-quiescent-current mode, because the internal low-dropout voltage regulator is being bypassed, thereby keeping internal circuitry operational. If VREG and IN1 are connected together, a 0.1-µF ceramic capacitor between VREG and ground is not needed if IN1 already has a bypass capacitor of 1µF to 10µF.

Descargar Ver vídeo con transcripción Video

Documentación técnica

star =Principal documentación para este producto seleccionada por TI
No se encontraron resultados. Borre su búsqueda y vuelva a intentarlo.
Ver todo 4
Tipo Título Fecha
* Data sheet Dual Hot-Swap Power Controllers with Independent Circuit Breaker datasheet (Rev. F) 10 may 2013
Selection guide Power Management Guide 2018 (Rev. R) 25 jun 2018
Selection guide Hot Swap Selection Tool 28 jul 2015
User guide Dual Hot Swap Controller Evaluation Module and Interface Card 10 abr 2000

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Herramienta de cálculo

TPS23XXCALC TPS230x/1x/2x/3x Design Calculator

This design utility allows the user to calculate the component values for external MOSFET, current limit setting, current limit sense resistor RSENSE, current limit setting resistor RSET, GATE capacitance Cg, TIMER capacitance CT, power-good feedback resistor divider, and other essential components (...)

Productos y hardware compatibles

Productos y hardware compatibles

Productos
Fusibles electrónicos y controladores de intercambio en caliente
TPS2300 Intercambio en caliente de canal doble de 3 V a 13 V, con interrupción de circuito de canal independ TPS2301 Intercambio en caliente de canal doble de 3 V a 13 V, con interrupción de circuito de canal independ TPS2310 Intercambio en caliente de canal doble de 3 V a 13 V, con interrupción de circuito de canal interdep TPS2311 Intercambio en caliente de canal doble de 3 V a 13 V, con interrupción de circuito de canal interdep TPS2320 Intercambio en caliente de canal doble de 3 V a 13 V, con activación activa baja TPS2321 Intercambio en caliente de canal doble de 3 V a 13 V, con activación activa alta TPS2330 Controlador de intercambio en caliente de 3 V a 13 V, con activación activa baja TPS2331 Controlador de intercambio en caliente de 3 V a 13 V, con activación activa alta
Herramienta de cálculo

TVS-RECOMMENDATION-CALC TVS diode recommendation tool

This tool suggests suitable TVS for given system parameters and abs max voltage rating of the device.
Productos y hardware compatibles

Productos y hardware compatibles

Este recurso de diseño es compatible con la mayoría de los productos de estas categorías.

Revise la página de detalles del producto para verificar la compatibilidad.

Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

Los productos recomendados pueden tener parámetros, módulos de evaluación o diseños de referencia relacionados con este producto de TI.

Soporte y capacitación

Foros de TI E2E™ con asistencia técnica de los ingenieros de TI

El contenido lo proporcionan “tal como está” TI y los colaboradores de la comunidad y no constituye especificaciones de TI. Consulte los términos de uso.

Si tiene preguntas sobre la calidad, el paquete o el pedido de productos de TI, consulte el soporte de TI. ​​​​​​​​​​​​​​

Videos