0h |
32 |
CPSW_IDVER_REG |
5280 0000h |
4h |
32 |
CPSW_SS_SYNCE_COUNT_REG |
5280 0004h |
8h |
32 |
CPSW_SS_SYNCE_MUX_REG |
5280 0008h |
Ch |
32 |
CPSW_SS_CONTROL_REG |
5280 000Ch |
18h |
32 |
CPSW_SS_INT_CONTROL_REG |
5280 0018h |
1Ch |
32 |
CPSW_SS_STATUS_REG |
5280 001Ch |
20h |
32 |
CPSW_SUBSYSTEM_CONFIG_REG |
5280 0020h |
30h |
32 |
CPSW_RGMII1_STATUS_REG |
5280 0030h |
34h |
32 |
CPSW_RGMII2_STATUS_REG |
5280 0034h |
F00h |
32 |
CPSW_MDIO_VERSION_REG |
5280 0F00h |
F04h |
32 |
CPSW_MDIO_CONTROL_REG |
5280 0F04h |
F08h |
32 |
CPSW_MDIO_ALIVE_REG |
5280 0F08h |
F0Ch |
32 |
CPSW_MDIO_LINK_REG |
5280 0F0Ch |
F10h |
32 |
CPSW_MDIO_LINK_INT_RAW_REG |
5280 0F10h |
F14h |
32 |
CPSW_MDIO_LINK_INT_MASKED_REG |
5280 0F14h |
F18h |
32 |
CPSW_MDIO_LINK_INT_MASK_SET_REG |
5280 0F18h |
F1Ch |
32 |
CPSW_MDIO_LINK_INT_MASK_CLEAR_REG |
5280 0F1Ch |
F20h |
32 |
CPSW_MDIO_USER_INT_RAW_REG |
5280 0F20h |
F24h |
32 |
CPSW_MDIO_USER_INT_MASKED_REG |
5280 0F24h |
F28h |
32 |
CPSW_MDIO_USER_INT_MASK_SET_REG |
5280 0F28h |
F2Ch |
32 |
CPSW_MDIO_USER_INT_MASK_CLEAR_REG |
5280 0F2Ch |
F30h |
32 |
CPSW_MDIO_MANUAL_IF_REG |
5280 0F30h |
F34h |
32 |
CPSW_MDIO_POLL_REG |
5280 0F34h |
F38h |
32 |
CPSW_MDIO_POLL_EN_REG |
5280 0F38h |
F3Ch |
32 |
CPSW_MDIO_CLAUS45_REG |
5280 0F3Ch |
F40h |
32 |
CPSW_MDIO_USER_ADDR0_REG |
5280 0F40h |
F44h |
32 |
CPSW_MDIO_USER_ADDR1_REG |
5280 0F44h |
F80h |
32 |
CPSW_MDIO_USER_GROUP_USER_ACCESS_REG_K |
5280 0F80h + formula |
F84h |
32 |
CPSW_MDIO_USER_GROUP_USER_PHY_SEL_REG_K |
5280 0F84h + formula |
1800h |
32 |
CPSW_REGS_INT_SS_C0_TH_THRESH_PULSE_EN_REG |
5280 1800h |
1804h |
32 |
CPSW_REGS_INT_SS_C0_TH_PULSE_EN_REG |
5280 1804h |
1808h |
32 |
CPSW_REGS_INT_SS_C0_FH_PULSE_EN_REG |
5280 1808h |
180Ch |
32 |
CPSW_REGS_INT_SS_C0_MISC_EN_REG |
5280 180Ch |
1810h |
32 |
CPSW_REGS_INT_SS_C0_TH_THRESH_PULSE_STATUS_REG |
5280 1810h |
1814h |
32 |
CPSW_REGS_INT_SS_C0_TH_PULSE_STATUS_REG |
5280 1814h |
1818h |
32 |
CPSW_REGS_INT_SS_C0_FH_PULSE_STATUS_REG |
5280 1818h |
181Ch |
32 |
CPSW_REGS_INT_SS_C0_MISC_STATUS_REG |
5280 181Ch |
1820h |
32 |
CPSW_REGS_INT_SS_C0_TH_IMAX_REG |
5280 1820h |
1824h |
32 |
CPSW_REGS_INT_SS_C0_FH_IMAX_REG |
5280 1824h |
1840h |
32 |
CPSW_REGS_INT_SS_C1_TH_THRESH_PULSE_EN_REG |
5280 1840h |
1844h |
32 |
CPSW_REGS_INT_SS_C1_TH_PULSE_EN_REG |
5280 1844h |
1848h |
32 |
CPSW_REGS_INT_SS_C1_FH_PULSE_EN_REG |
5280 1848h |
184Ch |
32 |
CPSW_REGS_INT_SS_C1_MISC_EN_REG |
5280 184Ch |
1850h |
32 |
CPSW_REGS_INT_SS_C1_TH_THRESH_PULSE_STATUS_REG |
5280 1850h |
1854h |
32 |
CPSW_REGS_INT_SS_C1_TH_PULSE_STATUS_REG |
5280 1854h |
1858h |
32 |
CPSW_REGS_INT_SS_C1_FH_PULSE_STATUS_REG |
5280 1858h |
185Ch |
32 |
CPSW_REGS_INT_SS_C1_MISC_STATUS_REG |
5280 185Ch |
1860h |
32 |
CPSW_REGS_INT_SS_C1_TH_IMAX_REG |
5280 1860h |
1864h |
32 |
CPSW_REGS_INT_SS_C1_FH_IMAX_REG |
5280 1864h |
1880h |
32 |
CPSW_REGS_INT_SS_C2_TH_THRESH_PULSE_EN_REG |
5280 1880h |
1884h |
32 |
CPSW_REGS_INT_SS_C2_TH_PULSE_EN_REG |
5280 1884h |
1888h |
32 |
CPSW_REGS_INT_SS_C2_FH_PULSE_EN_REG |
5280 1888h |
188Ch |
32 |
CPSW_REGS_INT_SS_C2_MISC_EN_REG |
5280 188Ch |
1890h |
32 |
CPSW_REGS_INT_SS_C2_TH_THRESH_PULSE_STATUS_REG |
5280 1890h |
1894h |
32 |
CPSW_REGS_INT_SS_C2_TH_PULSE_STATUS_REG |
5280 1894h |
1898h |
32 |
CPSW_REGS_INT_SS_C2_FH_PULSE_STATUS_REG |
5280 1898h |
189Ch |
32 |
CPSW_REGS_INT_SS_C2_MISC_STATUS_REG |
5280 189Ch |
18A0h |
32 |
CPSW_REGS_INT_SS_C2_TH_IMAX_REG |
5280 18A0h |
18A4h |
32 |
CPSW_REGS_INT_SS_C2_FH_IMAX_REG |
5280 18A4h |
18C0h |
32 |
CPSW_REGS_INT_SS_C3_TH_THRESH_PULSE_EN_REG |
5280 18C0h |
18C4h |
32 |
CPSW_REGS_INT_SS_C3_TH_PULSE_EN_REG |
5280 18C4h |
18C8h |
32 |
CPSW_REGS_INT_SS_C3_FH_PULSE_EN_REG |
5280 18C8h |
18CCh |
32 |
CPSW_REGS_INT_SS_C3_MISC_EN_REG |
5280 18CCh |
18D0h |
32 |
CPSW_REGS_INT_SS_C3_TH_THRESH_PULSE_STATUS_REG |
5280 18D0h |
18D4h |
32 |
CPSW_REGS_INT_SS_C3_TH_PULSE_STATUS_REG |
5280 18D4h |
18D8h |
32 |
CPSW_REGS_INT_SS_C3_FH_PULSE_STATUS_REG |
5280 18D8h |
18DCh |
32 |
CPSW_REGS_INT_SS_C3_MISC_STATUS_REG |
5280 18DCh |
18E0h |
32 |
CPSW_REGS_INT_SS_C3_TH_IMAX_REG |
5280 18E0h |
18E4h |
32 |
CPSW_REGS_INT_SS_C3_FH_IMAX_REG |
5280 18E4h |
20000h |
32 |
CPSW_NC_VER_REG |
5282 0000h |
20004h |
32 |
CPSW_NC_CONTROL_REG |
5282 0004h |
2000Ch |
32 |
CPSW_NC_STATUS_REG |
5282 000Ch |
20010h |
32 |
CPSW_NC_EM_CONTROL_REG |
5282 0010h |
20014h |
32 |
CPSW_NC_STAT_PORT_EN_REG |
5282 0014h |
20018h |
32 |
CPSW_NC_PTYPE_REG |
5282 0018h |
2001Ch |
32 |
CPSW_NC_SOFT_IDLE_REG |
5282 001Ch |
20020h |
32 |
CPSW_NC_THRU_RATE_REG |
5282 0020h |
20024h |
32 |
CPSW_NC_GAP_THRESH_REG |
5282 0024h |
2002Ch |
32 |
CPSW_NC_EEE_PRESCALE_REG |
5282 002Ch |
20030h |
32 |
CPSW_NC_TX_G_OFLOW_THRESH_SET_REG |
5282 0030h |
20034h |
32 |
CPSW_NC_TX_G_OFLOW_THRESH_CLR_REG |
5282 0034h |
20038h |
32 |
CPSW_NC_TX_G_BUF_THRESH_SET_L_REG |
5282 0038h |
2003Ch |
32 |
CPSW_NC_TX_G_BUF_THRESH_SET_H_REG |
5282 003Ch |
20040h |
32 |
CPSW_NC_TX_G_BUF_THRESH_CLR_L_REG |
5282 0040h |
20044h |
32 |
CPSW_NC_TX_G_BUF_THRESH_CLR_H_REG |
5282 0044h |
20050h |
32 |
CPSW_NC_VLAN_LTYPE_REG |
5282 0050h |
20054h |
32 |
CPSW_NC_EST_TS_DOMAIN_REG |
5282 0054h |
20100h |
32 |
CPSW_NC_TX_PRI0_MAXLEN_REG |
5282 0100h |
20104h |
32 |
CPSW_NC_TX_PRI1_MAXLEN_REG |
5282 0104h |
20108h |
32 |
CPSW_NC_TX_PRI2_MAXLEN_REG |
5282 0108h |
2010Ch |
32 |
CPSW_NC_TX_PRI3_MAXLEN_REG |
5282 010Ch |
20110h |
32 |
CPSW_NC_TX_PRI4_MAXLEN_REG |
5282 0110h |
20114h |
32 |
CPSW_NC_TX_PRI5_MAXLEN_REG |
5282 0114h |
20118h |
32 |
CPSW_NC_TX_PRI6_MAXLEN_REG |
5282 0118h |
2011Ch |
32 |
CPSW_NC_TX_PRI7_MAXLEN_REG |
5282 011Ch |
21004h |
32 |
CPSW_NC_CPPI_P0_CONTROL_REG |
5282 1004h |
21010h |
32 |
CPSW_NC_CPPI_P0_BLK_CNT_REG |
5282 1010h |
21014h |
32 |
CPSW_NC_CPPI_P0_PORT_VLAN_REG |
5282 1014h |
21018h |
32 |
CPSW_NC_CPPI_P0_TH_PRI_MAP_REG |
5282 1018h |
2101Ch |
32 |
CPSW_NC_CPPI_P0_PRI_CTL_REG |
5282 101Ch |
21020h |
32 |
CPSW_NC_CPPI_P0_FH_PRI_MAP_REG |
5282 1020h |
21024h |
32 |
CPSW_NC_CPPI_P0_FH_MAXLEN_REG |
5282 1024h |
21028h |
32 |
CPSW_NC_CPPI_P0_TH_BLKS_PRI_REG |
5282 1028h |
21030h |
32 |
CPSW_NC_CPPI_P0_IDLE2LPI_REG |
5282 1030h |
21034h |
32 |
CPSW_NC_CPPI_P0_LPI2WAKE_REG |
5282 1034h |
21038h |
32 |
CPSW_NC_CPPI_P0_EEE_STATUS_REG |
5282 1038h |
21050h |
32 |
CPSW_NC_CPPI_P0_FIFO_STATUS_REG |
5282 1050h |
21120h |
32 |
CPSW_NC_CPPI_FH_DSCP_MAP_REG |
5282 1120h |
21140h |
32 |
CPSW_NC_CPPI_P0_PRI_CIR_REG |
5282 1140h |
21160h |
32 |
CPSW_NC_CPPI_P0_PRI_EIR_REG |
5282 1160h |
21180h |
32 |
CPSW_NC_CPPI_P0_TH_D_THRESH_SET_L_REG |
5282 1180h |
21184h |
32 |
CPSW_NC_CPPI_P0_TH_D_THRESH_SET_H_REG |
5282 1184h |
21188h |
32 |
CPSW_NC_CPPI_P0_TH_D_THRESH_CLR_L_REG |
5282 1188h |
2118Ch |
32 |
CPSW_NC_CPPI_P0_TH_D_THRESH_CLR_H_REG |
5282 118Ch |
21190h |
32 |
CPSW_NC_CPPI_P0_TH_G_BUF_THRESH_SET_L_REG |
5282 1190h |
21194h |
32 |
CPSW_NC_CPPI_P0_TH_G_BUF_THRESH_SET_H_REG |
5282 1194h |
21198h |
32 |
CPSW_NC_CPPI_P0_TH_G_BUF_THRESH_CLR_L_REG |
5282 1198h |
2119Ch |
32 |
CPSW_NC_CPPI_P0_TH_G_BUF_THRESH_CLR_H_REG |
5282 119Ch |
21300h |
32 |
CPSW_NC_CPPI_P0_SRC_ID_A_REG |
5282 1300h |
21304h |
32 |
CPSW_NC_CPPI_P0_SRC_ID_B_REG |
5282 1304h |
21320h |
32 |
CPSW_NC_CPPI_P0_HOST_BLKS_PRI_REG |
5282 1320h |
22004h |
32 |
CPSW_NC_ETH_MAC_PN_CONTROL_REG_K |
5282 2004h + formula |
22008h |
32 |
CPSW_NC_ETH_MAC_PN_MAX_BLKS_REG_K |
5282 2008h + formula |
22010h |
32 |
CPSW_NC_ETH_MAC_PN_BLK_CNT_REG_K |
5282 2010h + formula |
22014h |
32 |
CPSW_NC_ETH_MAC_PN_PORT_VLAN_REG_K |
5282 2014h + formula |
22018h |
32 |
CPSW_NC_ETH_MAC_PN_TX_PRI_MAP_REG_K |
5282 2018h + formula |
2201Ch |
32 |
CPSW_NC_ETH_MAC_PN_PRI_CTL_REG_K |
5282 201Ch + formula |
22020h |
32 |
CPSW_NC_ETH_MAC_PN_RX_PRI_MAP_REG_K |
5282 2020h + formula |
22024h |
32 |
CPSW_NC_ETH_MAC_PN_RX_MAXLEN_REG_K |
5282 2024h + formula |
22028h |
32 |
CPSW_NC_ETH_MAC_PN_TX_BLKS_PRI_REG_K |
5282 2028h + formula |
22030h |
32 |
CPSW_NC_ETH_MAC_PN_IDLE2LPI_REG_K |
5282 2030h + formula |
22034h |
32 |
CPSW_NC_ETH_MAC_PN_LPI2WAKE_REG_K |
5282 2034h + formula |
22038h |
32 |
CPSW_NC_ETH_MAC_PN_EEE_STATUS_REG_K |
5282 2038h + formula |
22050h |
32 |
CPSW_NC_ETH_MAC_PN_FIFO_STATUS_REG_K |
5282 2050h + formula |
22060h |
32 |
CPSW_NC_ETH_MAC_PN_EST_CONTROL_REG_K |
5282 2060h + formula |
22120h |
32 |
CPSW_NC_ETH_MAC_PN_FH_DSCP_MAP_REG_K |
5282 2120h + formula |
22140h |
32 |
CPSW_NC_ETH_MAC_PN_PRI_CIR_REG_K |
5282 2140h + formula |
22160h |
32 |
CPSW_NC_ETH_MAC_PN_PRI_EIR_REG_K |
5282 2160h + formula |
22180h |
32 |
CPSW_NC_ETH_MAC_PN_TX_D_THRESH_SET_L_REG_K |
5282 2180h + formula |
22184h |
32 |
CPSW_NC_ETH_MAC_PN_TX_D_THRESH_SET_H_REG_K |
5282 2184h + formula |
22188h |
32 |
CPSW_NC_ETH_MAC_PN_TX_D_THRESH_CLR_L_REG_K |
5282 2188h + formula |
2218Ch |
32 |
CPSW_NC_ETH_MAC_PN_TX_D_THRESH_CLR_H_REG_K |
5282 218Ch + formula |
22190h |
32 |
CPSW_NC_ETH_MAC_PN_TX_G_BUF_THRESH_SET_L_REG_K |
5282 2190h + formula |
22194h |
32 |
CPSW_NC_ETH_MAC_PN_TX_G_BUF_THRESH_SET_H_REG_K |
5282 2194h + formula |
22198h |
32 |
CPSW_NC_ETH_MAC_PN_TX_G_BUF_THRESH_CLR_L_REG_K |
5282 2198h + formula |
2219Ch |
32 |
CPSW_NC_ETH_MAC_PN_TX_G_BUF_THRESH_CLR_H_REG_K |
5282 219Ch + formula |
22300h |
32 |
CPSW_NC_ETH_MAC_PN_TX_D_OFLOW_ADDVAL_L_REG_K |
5282 2300h + formula |
22304h |
32 |
CPSW_NC_ETH_MAC_PN_TX_D_OFLOW_ADDVAL_H_REG_K |
5282 2304h + formula |
22308h |
32 |
CPSW_NC_ETH_MAC_PN_SA_L_REG_K |
5282 2308h + formula |
2230Ch |
32 |
CPSW_NC_ETH_MAC_PN_SA_H_REG_K |
5282 230Ch + formula |
22310h |
32 |
CPSW_NC_ETH_MAC_PN_TS_CTL_REG_K |
5282 2310h + formula |
22314h |
32 |
CPSW_NC_ETH_MAC_PN_TS_SEQ_LTYPE_REG_K |
5282 2314h + formula |
22318h |
32 |
CPSW_NC_ETH_MAC_PN_TS_VLAN_LTYPE_REG_K |
5282 2318h + formula |
2231Ch |
32 |
CPSW_NC_ETH_MAC_PN_TS_CTL_LTYPE2_REG_K |
5282 231Ch + formula |
22320h |
32 |
CPSW_NC_ETH_MAC_PN_TS_CTL2_REG_K |
5282 2320h + formula |
22330h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_CONTROL_REG_K |
5282 2330h + formula |
22334h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_STATUS_REG_K |
5282 2334h + formula |
22338h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_SOFT_RESET_REG_K |
5282 2338h + formula |
2233Ch |
32 |
CPSW_NC_ETH_MAC_PN_MAC_BOFFTEST_REG_K |
5282 233Ch + formula |
22340h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_RX_PAUSETIMER_REG_K |
5282 2340h + formula |
22350h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_RXN_PAUSETIMER_REG_K |
5282 2350h + formula |
22370h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_TX_PAUSETIMER_REG_K |
5282 2370h + formula |
22380h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_TX0_PAUSETIMER_REG_K |
5282 2380h + formula |
223A0h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_EMCONTROL_REG_K |
5282 23A0h + formula |
223A4h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_TX_GAP_REG_K |
5282 23A4h + formula |
223A8h |
32 |
CPSW_NC_ETH_MAC_PN_MAC_PORT_CONFIG_K |
5282 23A8h + formula |
223ACh |
32 |
CPSW_NC_ETH_MAC_PN_INTERVLAN_OPX_POINTER_REG_K |
5282 23ACh + formula |
223B0h |
32 |
CPSW_NC_ETH_MAC_PN_INTERVLAN_OPX_A_REG_K |
5282 23B0h + formula |
223B4h |
32 |
CPSW_NC_ETH_MAC_PN_INTERVLAN_OPX_B_REG_K |
5282 23B4h + formula |
223B8h |
32 |
CPSW_NC_ETH_MAC_PN_INTERVLAN_OPX_C_REG_K |
5282 23B8h + formula |
223BCh |
32 |
CPSW_NC_ETH_MAC_PN_INTERVLAN_OPX_D_REG_K |
5282 23BCh + formula |
32000h |
32 |
CPSW_NC_EST_FETCH_LOC |
5283 2000h |
34000h |
32 |
CPSW_NC_CPDMA_REGS_FH_IDVER_REG |
5283 4000h |
34004h |
32 |
CPSW_NC_CPDMA_REGS_FH_CONTROL_REG |
5283 4004h |
34008h |
32 |
CPSW_NC_CPDMA_REGS_FH_TEARDOWN_REG |
5283 4008h |
3400Ch |
32 |
CPSW_NC_CPDMA_REGS_FH_CONTROL2_REG |
5283 400Ch |
34010h |
32 |
CPSW_NC_CPDMA_REGS_TH_IDVER_REG |
5283 4010h |
34014h |
32 |
CPSW_NC_CPDMA_REGS_TH_CONTROL_REG |
5283 4014h |
34018h |
32 |
CPSW_NC_CPDMA_REGS_TH_TEARDOWN_REG |
5283 4018h |
3401Ch |
32 |
CPSW_NC_CPDMA_REGS_SOFT_RESET_REG |
5283 401Ch |
34020h |
32 |
CPSW_NC_CPDMA_REGS_CONTROL_REG |
5283 4020h |
34024h |
32 |
CPSW_NC_CPDMA_REGS_STATUS_REG |
5283 4024h |
34028h |
32 |
CPSW_NC_CPDMA_REGS_TH_BUFFER_OFFSET_REG |
5283 4028h |
3402Ch |
32 |
CPSW_NC_CPDMA_REGS_EMULATION_CONTROL_REG |
5283 402Ch |
34080h |
32 |
CPSW_NC_CPDMA_INT_FH_INTSTAT_RAW_REG |
5283 4080h |
34084h |
32 |
CPSW_NC_CPDMA_INT_FH_INTSTAT_MASKED_REG |
5283 4084h |
34088h |
32 |
CPSW_NC_CPDMA_INT_FH_INTMASK_SET_REG |
5283 4088h |
3408Ch |
32 |
CPSW_NC_CPDMA_INT_FH_INTMASK_CLEAR_REG |
5283 408Ch |
34090h |
32 |
CPSW_NC_CPDMA_INT_IN_VECTOR_REG |
5283 4090h |
34094h |
32 |
CPSW_NC_CPDMA_INT_EOI_VECTOR_REG |
5283 4094h |
340A0h |
32 |
CPSW_NC_CPDMA_INT_TH_INTSTAT_RAW_REG |
5283 40A0h |
340A4h |
32 |
CPSW_NC_CPDMA_INT_TH_INTSTAT_MASKED_REG |
5283 40A4h |
340A8h |
32 |
CPSW_NC_CPDMA_INT_TH_INTMASK_SET_REG |
5283 40A8h |
340ACh |
32 |
CPSW_NC_CPDMA_INT_TH_INTMASK_CLEAR_REG |
5283 40ACh |
340B0h |
32 |
CPSW_NC_CPDMA_INT_INTSTAT_RAW_REG |
5283 40B0h |
340B4h |
32 |
CPSW_NC_CPDMA_INT_INTSTAT_MASKED_REG |
5283 40B4h |
340B8h |
32 |
CPSW_NC_CPDMA_INT_INTMASK_SET_REG |
5283 40B8h |
340BCh |
32 |
CPSW_NC_CPDMA_INT_INTMASK_CLEAR_REG |
5283 40BCh |
340C0h |
32 |
CPSW_NC_CPDMA_INT_TH0_PENDTHRESH_REG |
5283 40C0h |
340C4h |
32 |
CPSW_NC_CPDMA_INT_TH1_PENDTHRESH_REG |
5283 40C4h |
340C8h |
32 |
CPSW_NC_CPDMA_INT_TH2_PENDTHRESH_REG |
5283 40C8h |
340CCh |
32 |
CPSW_NC_CPDMA_INT_TH3_PENDTHRESH_REG |
5283 40CCh |
340D0h |
32 |
CPSW_NC_CPDMA_INT_TH4_PENDTHRESH_REG |
5283 40D0h |
340D4h |
32 |
CPSW_NC_CPDMA_INT_TH5_PENDTHRESH_REG |
5283 40D4h |
340D8h |
32 |
CPSW_NC_CPDMA_INT_TH6_PENDTHRESH_REG |
5283 40D8h |
340DCh |
32 |
CPSW_NC_CPDMA_INT_TH7_PENDTHRESH_REG |
5283 40DCh |
340E0h |
32 |
CPSW_NC_CPDMA_INT_TH0_FREEBUFFER_REG |
5283 40E0h |
340E4h |
32 |
CPSW_NC_CPDMA_INT_TH1_FREEBUFFER_REG |
5283 40E4h |
340E8h |
32 |
CPSW_NC_CPDMA_INT_TH2_FREEBUFFER_REG |
5283 40E8h |
340ECh |
32 |
CPSW_NC_CPDMA_INT_TH3_FREEBUFFER_REG |
5283 40ECh |
340F0h |
32 |
CPSW_NC_CPDMA_INT_TH4_FREEBUFFER_REG |
5283 40F0h |
340F4h |
32 |
CPSW_NC_CPDMA_INT_TH5_FREEBUFFER_REG |
5283 40F4h |
340F8h |
32 |
CPSW_NC_CPDMA_INT_TH6_FREEBUFFER_REG |
5283 40F8h |
340FCh |
32 |
CPSW_NC_CPDMA_INT_TH7_FREEBUFFER_REG |
5283 40FCh |
34200h |
32 |
CPSW_NC_CPDMA_SRAM_FH0_HDP_REG |
5283 4200h |
34204h |
32 |
CPSW_NC_CPDMA_SRAM_FH1_HDP_REG |
5283 4204h |
34208h |
32 |
CPSW_NC_CPDMA_SRAM_FH2_HDP_REG |
5283 4208h |
3420Ch |
32 |
CPSW_NC_CPDMA_SRAM_FH3_HDP_REG |
5283 420Ch |
34210h |
32 |
CPSW_NC_CPDMA_SRAM_FH4_HDP_REG |
5283 4210h |
34214h |
32 |
CPSW_NC_CPDMA_SRAM_FH5_HDP_REG |
5283 4214h |
34218h |
32 |
CPSW_NC_CPDMA_SRAM_FH6_HDP_REG |
5283 4218h |
3421Ch |
32 |
CPSW_NC_CPDMA_SRAM_FH7_HDP_REG |
5283 421Ch |
34220h |
32 |
CPSW_NC_CPDMA_SRAM_TH0_HDP_REG |
5283 4220h |
34224h |
32 |
CPSW_NC_CPDMA_SRAM_TH1_HDP_REG |
5283 4224h |
34228h |
32 |
CPSW_NC_CPDMA_SRAM_TH2_HDP_REG |
5283 4228h |
3422Ch |
32 |
CPSW_NC_CPDMA_SRAM_TH3_HDP_REG |
5283 422Ch |
34230h |
32 |
CPSW_NC_CPDMA_SRAM_TH4_HDP_REG |
5283 4230h |
34234h |
32 |
CPSW_NC_CPDMA_SRAM_TH5_HDP_REG |
5283 4234h |
34238h |
32 |
CPSW_NC_CPDMA_SRAM_TH6_HDP_REG |
5283 4238h |
3423Ch |
32 |
CPSW_NC_CPDMA_SRAM_TH7_HDP_REG |
5283 423Ch |
34240h |
32 |
CPSW_NC_CPDMA_SRAM_FH0_CP_REG |
5283 4240h |
34244h |
32 |
CPSW_NC_CPDMA_SRAM_FH1_CP_REG |
5283 4244h |
34248h |
32 |
CPSW_NC_CPDMA_SRAM_FH2_CP_REG |
5283 4248h |
3424Ch |
32 |
CPSW_NC_CPDMA_SRAM_FH3_CP_REG |
5283 424Ch |
34250h |
32 |
CPSW_NC_CPDMA_SRAM_FH4_CP_REG |
5283 4250h |
34254h |
32 |
CPSW_NC_CPDMA_SRAM_FH5_CP_REG |
5283 4254h |
34258h |
32 |
CPSW_NC_CPDMA_SRAM_FH6_CP_REG |
5283 4258h |
3425Ch |
32 |
CPSW_NC_CPDMA_SRAM_FH7_CP_REG |
5283 425Ch |
34260h |
32 |
CPSW_NC_CPDMA_SRAM_TH0_CP_REG |
5283 4260h |
34264h |
32 |
CPSW_NC_CPDMA_SRAM_TH1_CP_REG |
5283 4264h |
34268h |
32 |
CPSW_NC_CPDMA_SRAM_TH2_CP_REG |
5283 4268h |
3426Ch |
32 |
CPSW_NC_CPDMA_SRAM_TH3_CP_REG |
5283 426Ch |
34270h |
32 |
CPSW_NC_CPDMA_SRAM_TH4_CP_REG |
5283 4270h |
34274h |
32 |
CPSW_NC_CPDMA_SRAM_TH5_CP_REG |
5283 4274h |
34278h |
32 |
CPSW_NC_CPDMA_SRAM_TH6_CP_REG |
5283 4278h |
3427Ch |
32 |
CPSW_NC_CPDMA_SRAM_TH7_CP_REG |
5283 427Ch |
34300h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH0_HDP_REG |
5283 4300h |
34304h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH1_HDP_REG |
5283 4304h |
34308h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH2_HDP_REG |
5283 4308h |
3430Ch |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH3_HDP_REG |
5283 430Ch |
34310h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH4_HDP_REG |
5283 4310h |
34314h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH5_HDP_REG |
5283 4314h |
34318h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH6_HDP_REG |
5283 4318h |
3431Ch |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH7_HDP_REG |
5283 431Ch |
34320h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH0_HDP_REG |
5283 4320h |
34324h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH1_HDP_REG |
5283 4324h |
34328h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH2_HDP_REG |
5283 4328h |
3432Ch |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH3_HDP_REG |
5283 432Ch |
34330h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH4_HDP_REG |
5283 4330h |
34334h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH5_HDP_REG |
5283 4334h |
34338h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH6_HDP_REG |
5283 4338h |
3433Ch |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH7_HDP_REG |
5283 433Ch |
34340h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH0_CP_REG |
5283 4340h |
34344h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH1_CP_REG |
5283 4344h |
34348h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH2_CP_REG |
5283 4348h |
3434Ch |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH3_CP_REG |
5283 434Ch |
34350h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH4_CP_REG |
5283 4350h |
34354h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH5_CP_REG |
5283 4354h |
34358h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH6_CP_REG |
5283 4358h |
3435Ch |
32 |
CPSW_NC_CPDMA_SRAM_TEST_FH7_CP_REG |
5283 435Ch |
34360h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH0_CP_REG |
5283 4360h |
34364h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH1_CP_REG |
5283 4364h |
34368h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH2_CP_REG |
5283 4368h |
3436Ch |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH3_CP_REG |
5283 436Ch |
34370h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH4_CP_REG |
5283 4370h |
34374h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH5_CP_REG |
5283 4374h |
34378h |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH6_CP_REG |
5283 4378h |
3437Ch |
32 |
CPSW_NC_CPDMA_SRAM_TEST_TH7_CP_REG |
5283 437Ch |
3A000h |
32 |
CPSW_NC_STAT_RXGOODFRAMES_K |
5283 A000h + formula |
3A004h |
32 |
CPSW_NC_STAT_RXBROADCASTFRAMES_K |
5283 A004h + formula |
3A008h |
32 |
CPSW_NC_STAT_RXMULTICASTFRAMES_K |
5283 A008h + formula |
3A00Ch |
32 |
CPSW_NC_STAT_RXPAUSEFRAMES_K |
5283 A00Ch + formula |
3A010h |
32 |
CPSW_NC_STAT_RXCRCERRORS_K |
5283 A010h + formula |
3A014h |
32 |
CPSW_NC_STAT_RXALIGNCODEERRORS_K |
5283 A014h + formula |
3A018h |
32 |
CPSW_NC_STAT_RXOVERSIZEDFRAMES_K |
5283 A018h + formula |
3A01Ch |
32 |
CPSW_NC_STAT_RXJABBERFRAMES_K |
5283 A01Ch + formula |
3A020h |
32 |
CPSW_NC_STAT_RXUNDERSIZEDFRAMES_K |
5283 A020h + formula |
3A024h |
32 |
CPSW_NC_STAT_RXFRAGMENTS_K |
5283 A024h + formula |
3A028h |
32 |
CPSW_NC_STAT_ALE_DROP_K |
5283 A028h + formula |
3A02Ch |
32 |
CPSW_NC_STAT_ALE_OVERRUN_DROP_K |
5283 A02Ch + formula |
3A030h |
32 |
CPSW_NC_STAT_RXOCTETS_K |
5283 A030h + formula |
3A034h |
32 |
CPSW_NC_STAT_TXGOODFRAMES_K |
5283 A034h + formula |
3A038h |
32 |
CPSW_NC_STAT_TXBROADCASTFRAMES_K |
5283 A038h + formula |
3A03Ch |
32 |
CPSW_NC_STAT_TXMULTICASTFRAMES_K |
5283 A03Ch + formula |
3A040h |
32 |
CPSW_NC_STAT_TXPAUSEFRAMES_K |
5283 A040h + formula |
3A044h |
32 |
CPSW_NC_STAT_TXDEFERREDFRAMES_K |
5283 A044h + formula |
3A048h |
32 |
CPSW_NC_STAT_TXCOLLISIONFRAMES_K |
5283 A048h + formula |
3A04Ch |
32 |
CPSW_NC_STAT_TXSINGLECOLLFRAMES_K |
5283 A04Ch + formula |
3A050h |
32 |
CPSW_NC_STAT_TXMULTCOLLFRAMES_K |
5283 A050h + formula |
3A054h |
32 |
CPSW_NC_STAT_TXEXCESSIVECOLLISIONS_K |
5283 A054h + formula |
3A058h |
32 |
CPSW_NC_STAT_TXLATECOLLISIONS_K |
5283 A058h + formula |
3A05Ch |
32 |
CPSW_NC_STAT_RXIPGERROR_K |
5283 A05Ch + formula |
3A060h |
32 |
CPSW_NC_STAT_TXCARRIERSENSEERRORS_K |
5283 A060h + formula |
3A064h |
32 |
CPSW_NC_STAT_TXOCTETS_K |
5283 A064h + formula |
3A068h |
32 |
CPSW_NC_STAT_OCTETFRAMES64_K |
5283 A068h + formula |
3A06Ch |
32 |
CPSW_NC_STAT_OCTETFRAMES65T127_K |
5283 A06Ch + formula |
3A070h |
32 |
CPSW_NC_STAT_OCTETFRAMES128T255_K |
5283 A070h + formula |
3A074h |
32 |
CPSW_NC_STAT_OCTETFRAMES256T511_K |
5283 A074h + formula |
3A078h |
32 |
CPSW_NC_STAT_OCTETFRAMES512T1023_K |
5283 A078h + formula |
3A07Ch |
32 |
CPSW_NC_STAT_OCTETFRAMES1024TUP_K |
5283 A07Ch + formula |
3A080h |
32 |
CPSW_NC_STAT_NETOCTETS_K |
5283 A080h + formula |
3A084h |
32 |
CPSW_NC_STAT_RX_BOTTOM_OF_FIFO_DROP_K |
5283 A084h + formula |
3A088h |
32 |
CPSW_NC_STAT_PORTMASK_DROP_K |
5283 A088h + formula |
3A08Ch |
32 |
CPSW_NC_STAT_RX_TOP_OF_FIFO_DROP_K |
5283 A08Ch + formula |
3A090h |
32 |
CPSW_NC_STAT_ALE_RATE_LIMIT_DROP_K |
5283 A090h + formula |
3A094h |
32 |
CPSW_NC_STAT_ALE_VID_INGRESS_DROP_K |
5283 A094h + formula |
3A098h |
32 |
CPSW_NC_STAT_ALE_DA_EQ_SA_DROP_K |
5283 A098h + formula |
3A09Ch |
32 |
CPSW_NC_STAT_ALE_BLOCK_DROP_K |
5283 A09Ch + formula |
3A0A0h |
32 |
CPSW_NC_STAT_ALE_SECURE_DROP_K |
5283 A0A0h + formula |
3A0A4h |
32 |
CPSW_NC_STAT_ALE_AUTH_DROP_K |
5283 A0A4h + formula |
3A0A8h |
32 |
CPSW_NC_STAT_ALE_UNKN_UNI_K |
5283 A0A8h + formula |
3A0ACh |
32 |
CPSW_NC_STAT_ALE_UNKN_UNI_BCNT_K |
5283 A0ACh + formula |
3A0B0h |
32 |
CPSW_NC_STAT_ALE_UNKN_MLT_K |
5283 A0B0h + formula |
3A0B4h |
32 |
CPSW_NC_STAT_ALE_UNKN_MLT_BCNT_K |
5283 A0B4h + formula |
3A0B8h |
32 |
CPSW_NC_STAT_ALE_UNKN_BRD_K |
5283 A0B8h + formula |
3A0BCh |
32 |
CPSW_NC_STAT_ALE_UNKN_BRD_BCNT_K |
5283 A0BCh + formula |
3A0C0h |
32 |
CPSW_NC_STAT_ALE_POL_MATCH_K |
5283 A0C0h + formula |
3A0C4h |
32 |
CPSW_NC_STAT_ALE_POL_MATCH_RED_K |
5283 A0C4h + formula |
3A0C8h |
32 |
CPSW_NC_STAT_ALE_POL_MATCH_YELLOW_K |
5283 A0C8h + formula |
3A0CCh |
32 |
CPSW_NC_STAT_ALE_MULT_SA_DROP_K |
5283 A0CCh + formula |
3A0D0h |
32 |
CPSW_NC_STAT_ALE_DUAL_VLAN_DROP_K |
5283 A0D0h + formula |
3A0D4h |
32 |
CPSW_NC_STAT_ALE_LEN_ERROR_DROP_K |
5283 A0D4h + formula |
3A0D8h |
32 |
CPSW_NC_STAT_ALE_IP_NEXT_HDR_DROP_K |
5283 A0D8h + formula |
3A0DCh |
32 |
CPSW_NC_STAT_ALE_IPV4_FRAG_DROP_K |
5283 A0DCh + formula |
3A17Ch |
32 |
CPSW_NC_STAT_TX_MEMORY_PROTECT_ERROR_K |
5283 A17Ch + formula |
3A180h |
32 |
CPSW_NC_STAT_ENET_PN_TX_PRI_REG_K |
5283 A180h + formula |
3A1A0h |
32 |
CPSW_NC_STAT_ENET_PN_TX_PRI_BCNT_REG_K |
5283 A1A0h + formula |
3A1C0h |
32 |
CPSW_NC_STAT_ENET_PN_TX_PRI_DROP_REG_K |
5283 A1C0h + formula |
3A1E0h |
32 |
CPSW_NC_STAT_ENET_PN_TX_PRI_DROP_BCNT_REG_K |
5283 A1E0h + formula |
3D000h |
32 |
CPSW_NC_CPTS_IDVER_REG |
5283 D000h |
3D004h |
32 |
CPSW_NC_CPTS_CONTROL_REG |
5283 D004h |
3D008h |
32 |
CPSW_NC_CPTS_RFTCLK_SEL_REG |
5283 D008h |
3D00Ch |
32 |
CPSW_NC_CPTS_TS_PUSH_REG |
5283 D00Ch |
3D010h |
32 |
CPSW_NC_CPTS_TS_LOAD_VAL_REG |
5283 D010h |
3D014h |
32 |
CPSW_NC_CPTS_TS_LOAD_EN_REG |
5283 D014h |
3D018h |
32 |
CPSW_NC_CPTS_TS_COMP_VAL_REG |
5283 D018h |
3D01Ch |
32 |
CPSW_NC_CPTS_TS_COMP_LEN_REG |
5283 D01Ch |
3D020h |
32 |
CPSW_NC_CPTS_INTSTAT_RAW_REG |
5283 D020h |
3D024h |
32 |
CPSW_NC_CPTS_INTSTAT_MASKED_REG |
5283 D024h |
3D028h |
32 |
CPSW_NC_CPTS_INT_ENABLE_REG |
5283 D028h |
3D02Ch |
32 |
CPSW_NC_CPTS_TS_COMP_NUDGE_REG |
5283 D02Ch |
3D030h |
32 |
CPSW_NC_CPTS_EVENT_POP_REG |
5283 D030h |
3D034h |
32 |
CPSW_NC_CPTS_EVENT_0_REG |
5283 D034h |
3D038h |
32 |
CPSW_NC_CPTS_EVENT_1_REG |
5283 D038h |
3D03Ch |
32 |
CPSW_NC_CPTS_EVENT_2_REG |
5283 D03Ch |
3D040h |
32 |
CPSW_NC_CPTS_EVENT_3_REG |
5283 D040h |
3D044h |
32 |
CPSW_NC_CPTS_TS_LOAD_HIGH_VAL_REG |
5283 D044h |
3D048h |
32 |
CPSW_NC_CPTS_TS_COMP_HIGH_VAL_REG |
5283 D048h |
3D04Ch |
32 |
CPSW_NC_CPTS_TS_ADD_VAL_REG |
5283 D04Ch |
3D050h |
32 |
CPSW_NC_CPTS_TS_PPM_LOW_VAL_REG |
5283 D050h |
3D054h |
32 |
CPSW_NC_CPTS_TS_PPM_HIGH_VAL_REG |
5283 D054h |
3D058h |
32 |
CPSW_NC_CPTS_TS_NUDGE_VAL_REG |
5283 D058h |
3D0D0h |
32 |
CPSW_NC_CPTS_TS_CONFIG |
5283 D0D0h |
3D0E0h |
32 |
CPSW_NC_CPTS_TS_GENF_COMP_LOW_REG_L |
5283 D0E0h + formula |
3D0E4h |
32 |
CPSW_NC_CPTS_TS_GENF_COMP_HIGH_REG_L |
5283 D0E4h + formula |
3D0E8h |
32 |
CPSW_NC_CPTS_TS_GENF_CONTROL_REG_L |
5283 D0E8h + formula |
3D0ECh |
32 |
CPSW_NC_CPTS_TS_GENF_LENGTH_REG_L |
5283 D0ECh + formula |
3D0F0h |
32 |
CPSW_NC_CPTS_TS_GENF_PPM_LOW_REG_L |
5283 D0F0h + formula |
3D0F4h |
32 |
CPSW_NC_CPTS_TS_GENF_PPM_HIGH_REG_L |
5283 D0F4h + formula |
3D0F8h |
32 |
CPSW_NC_CPTS_TS_GENF_NUDGE_REG_L |
5283 D0F8h + formula |
3D200h |
32 |
CPSW_NC_CPTS_TS_ESTF_COMP_LOW_REG_L |
5283 D200h + formula |
3D204h |
32 |
CPSW_NC_CPTS_TS_ESTF_COMP_HIGH_REG_L |
5283 D204h + formula |
3D208h |
32 |
CPSW_NC_CPTS_TS_ESTF_CONTROL_REG_L |
5283 D208h + formula |
3D20Ch |
32 |
CPSW_NC_CPTS_TS_ESTF_LENGTH_REG_L |
5283 D20Ch + formula |
3D210h |
32 |
CPSW_NC_CPTS_TS_ESTF_PPM_LOW_REG_L |
5283 D210h + formula |
3D214h |
32 |
CPSW_NC_CPTS_TS_ESTF_PPM_HIGH_REG_L |
5283 D214h + formula |
3D218h |
32 |
CPSW_NC_CPTS_TS_ESTF_NUDGE_REG_L |
5283 D218h + formula |
3E000h |
32 |
CPSW_NC_ALE_MOD_VER |
5283 E000h |
3E004h |
32 |
CPSW_NC_ALE_STATUS |
5283 E004h |
3E008h |
32 |
CPSW_NC_ALE_CONTROL |
5283 E008h |
3E00Ch |
32 |
CPSW_NC_ALE_CTRL2 |
5283 E00Ch |
3E010h |
32 |
CPSW_NC_ALE_PRESCALE |
5283 E010h |
3E014h |
32 |
CPSW_NC_ALE_AGING_CTRL |
5283 E014h |
3E01Ch |
32 |
CPSW_NC_ALE_NXT_HDR |
5283 E01Ch |
3E020h |
32 |
CPSW_NC_ALE_TBLCTL |
5283 E020h |
3E034h |
32 |
CPSW_NC_ALE_TBLW2 |
5283 E034h |
3E038h |
32 |
CPSW_NC_ALE_TBLW1 |
5283 E038h |
3E03Ch |
32 |
CPSW_NC_ALE_TBLW0 |
5283 E03Ch |
3E040h |
32 |
CPSW_NC_ALE_I0_PORTCTL0 |
5283 E040h |
3E090h |
32 |
CPSW_NC_ALE_UVLAN_MEMBER |
5283 E090h |
3E094h |
32 |
CPSW_NC_ALE_UVLAN_URCAST |
5283 E094h |
3E098h |
32 |
CPSW_NC_ALE_UVLAN_RMCAST |
5283 E098h |
3E09Ch |
32 |
CPSW_NC_ALE_UVLAN_UNTAG |
5283 E09Ch |
3E0B4h |
32 |
CPSW_NC_ALE_FAST_LUT |
5283 E0B4h |
3E0B8h |
32 |
CPSW_NC_ALE_STAT_DIAG |
5283 E0B8h |
3E0BCh |
32 |
CPSW_NC_ALE_OAM_LB_CTRL |
5283 E0BCh |
3E0FCh |
32 |
CPSW_NC_ALE_EGRESSOP |
5283 E0FCh |
3E100h |
32 |
CPSW_NC_ALE_POLICECFG0 |
5283 E100h |
3E104h |
32 |
CPSW_NC_ALE_POLICECFG1 |
5283 E104h |
3E108h |
32 |
CPSW_NC_ALE_POLICECFG2 |
5283 E108h |
3E10Ch |
32 |
CPSW_NC_ALE_POLICECFG3 |
5283 E10Ch |
3E110h |
32 |
CPSW_NC_ALE_POLICECFG4 |
5283 E110h |
3E118h |
32 |
CPSW_NC_ALE_POLICECFG6 |
5283 E118h |
3E11Ch |
32 |
CPSW_NC_ALE_POLICECFG7 |
5283 E11Ch |
3E120h |
32 |
CPSW_NC_ALE_POLICETBLCTL |
5283 E120h |
3E124h |
32 |
CPSW_NC_ALE_POLICECONTROL |
5283 E124h |
3E128h |
32 |
CPSW_NC_ALE_POLICETESTCTL |
5283 E128h |
3E12Ch |
32 |
CPSW_NC_ALE_POLICEHSTAT |
5283 E12Ch |
3E134h |
32 |
CPSW_NC_ALE_THREADMAPDEF |
5283 E134h |
3E138h |
32 |
CPSW_NC_ALE_THREADMAPCTL |
5283 E138h |
3E13Ch |
32 |
CPSW_NC_ALE_THREADMAPVAL |
5283 E13Ch |
3F000h |
32 |
CPSW_NC_ECC_REV |
5283 F000h |
3F008h |
32 |
CPSW_NC_ECC_VECTOR |
5283 F008h |
3F00Ch |
32 |
CPSW_NC_ECC_STAT |
5283 F00Ch |
3F010h |
32 |
CPSW_NC_ECC_RESERVED_SVBUS |
5283 F010h |
3F03Ch |
32 |
CPSW_NC_ECC_SEC_EOI_REG |
5283 F03Ch |
3F040h |
32 |
CPSW_NC_ECC_SEC_STATUS_REG0 |
5283 F040h |
3F080h |
32 |
CPSW_NC_ECC_SEC_ENABLE_SET_REG0 |
5283 F080h |
3F0C0h |
32 |
CPSW_NC_ECC_SEC_ENABLE_CLR_REG0 |
5283 F0C0h |
3F13Ch |
32 |
CPSW_NC_ECC_DED_EOI_REG |
5283 F13Ch |
3F140h |
32 |
CPSW_NC_ECC_DED_STATUS_REG0 |
5283 F140h |
3F180h |
32 |
CPSW_NC_ECC_DED_ENABLE_SET_REG0 |
5283 F180h |
3F1C0h |
32 |
CPSW_NC_ECC_DED_ENABLE_CLR_REG0 |
5283 F1C0h |
3F200h |
32 |
CPSW_NC_ECC_AGGR_ENABLE_SET |
5283 F200h |
3F204h |
32 |
CPSW_NC_ECC_AGGR_ENABLE_CLR |
5283 F204h |
3F208h |
32 |
CPSW_NC_ECC_AGGR_STATUS_SET |
5283 F208h |
3F20Ch |
32 |
CPSW_NC_ECC_AGGR_STATUS_CLR |
5283 F20Ch |