Inicio Gestión de la energía Interruptores de potencia Relés de estado sólido

Controlador de conmutación aislado reforzado para automoción, con alimentación de puerta de 15 V y c

Detalles del producto

Withstand isolation voltage (VISO) (Vrms) 5000 FET External Number of channels 1 Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Gate drive voltage (V) 15 Features Inductive isolation TI functional safety category Functional Safety-Capable Operating temperature range (°C) -40 to 125 Turnoff time (disable) (ns) 3000 Rating Automotive Isolation rating Reinforced CMTI (min) (kV/µs) 100 Working isolation voltage (VIOWM) (Vrms) 1697 Surge isolation voltage (VIOSM) (VPK) 12000 Transient isolation voltage (VIOTM) (VPK) 7070
Withstand isolation voltage (VISO) (Vrms) 5000 FET External Number of channels 1 Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Gate drive voltage (V) 15 Features Inductive isolation TI functional safety category Functional Safety-Capable Operating temperature range (°C) -40 to 125 Turnoff time (disable) (ns) 3000 Rating Automotive Isolation rating Reinforced CMTI (min) (kV/µs) 100 Working isolation voltage (VIOWM) (Vrms) 1697 Surge isolation voltage (VIOSM) (VPK) 12000 Transient isolation voltage (VIOTM) (VPK) 7070
UNKNOWN (DVX) 16 See data sheet
  • Drives external power transistors
  • No isolated secondary supply required
  • 15.8-V gate drive, 1.5/2.5-A peak source and sink current
  • 5-kVRMS reinforced isolation
  • Up to 25-mW, 5-V supply for external auxiliary circuitry
  • Dual isolated high-speed comparators with integrated voltage reference ±1.5%
  • Open-drain outputs for fault and alarm indicators
  • AEC Q-100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Functional Safety-Capable
  • Safety-related certifications
    • Planned: 7070-VPK reinforced isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • Planned: 5-kVRMS isolation for 1 minute per UL 1577
  • Drives external power transistors
  • No isolated secondary supply required
  • 15.8-V gate drive, 1.5/2.5-A peak source and sink current
  • 5-kVRMS reinforced isolation
  • Up to 25-mW, 5-V supply for external auxiliary circuitry
  • Dual isolated high-speed comparators with integrated voltage reference ±1.5%
  • Open-drain outputs for fault and alarm indicators
  • AEC Q-100 qualified for automotive applications:
    • Temperature grade 1: –40°C to +125°C, TA
  • Functional Safety-Capable
  • Safety-related certifications
    • Planned: 7070-VPK reinforced isolation per DIN EN IEC 60747-17 (VDE 0884-17)
    • Planned: 5-kVRMS isolation for 1 minute per UL 1577

The TPSI3100-Q1 is a fully integrated isolated switch driver, which when combined with an external power switch, forms a complete isolated solid state relay solution. With a gate drive voltage of 15.8-V with 1.5/2.5-A peak source/sink current, a large availability of power switches can be used to meet many application needs. The TPSI3100-Q1 generates its own secondary bias supply from power received on its primary side, so no isolated secondary supply bias is required. The TPSI3100-Q1 provides additional power via the nominal 5-V rail (VDDM) for use by auxiliary circuits to perform various function such as current and voltage monitoring or remote temperature detection. The TPSI3100-Q1 isolation is extremely robust with much higher reliability, lower power consumption, and increased temperature ranges than those found using traditional mechanical relays and optocouplers.

The TPSI3100-Q1 integrates a communication back-channel that transfers status information from the secondary side to the primary side via open-drain outputs, PGOOD (Power Good), FLT1 (Fault 1), and ALM1 (Alarm 1). Dual high-speed comparators with an integrated shared voltage reference are used to assert FLT1 and ALM1. When the comparator input, FLT1_CMP, exceeds the voltage reference, the driver is immediately asserted low and FLT1 is also driven low, indicating to the system that a fault has occurred. This is useful for disabling the external switch with low latency on critical events, such as over-current detection. When the comparator input, ALM1_CMP, exceeds the voltage reference, ALM1 signal is asserted low, but no action is taken by the driver. This may be useful as an alarm or warning indicator for over-temperature or over-voltage events.

The TPSI310xL-Q1 series offers a latch based fault indicator. When a fault is detected, the driver and the fault indicator are asserted low and remain latched, until EN is asserted low. The TPSI310x-Q1 series has a non-latched fault indicator. If the fault event is no longer present, FLT1 deasserts and the driver, after a specified recovery period, follows the state of the EN pin. If the fault event still remains, both the fault indicator and the driver remain asserted low.

The TPSI3100-Q1 is a fully integrated isolated switch driver, which when combined with an external power switch, forms a complete isolated solid state relay solution. With a gate drive voltage of 15.8-V with 1.5/2.5-A peak source/sink current, a large availability of power switches can be used to meet many application needs. The TPSI3100-Q1 generates its own secondary bias supply from power received on its primary side, so no isolated secondary supply bias is required. The TPSI3100-Q1 provides additional power via the nominal 5-V rail (VDDM) for use by auxiliary circuits to perform various function such as current and voltage monitoring or remote temperature detection. The TPSI3100-Q1 isolation is extremely robust with much higher reliability, lower power consumption, and increased temperature ranges than those found using traditional mechanical relays and optocouplers.

The TPSI3100-Q1 integrates a communication back-channel that transfers status information from the secondary side to the primary side via open-drain outputs, PGOOD (Power Good), FLT1 (Fault 1), and ALM1 (Alarm 1). Dual high-speed comparators with an integrated shared voltage reference are used to assert FLT1 and ALM1. When the comparator input, FLT1_CMP, exceeds the voltage reference, the driver is immediately asserted low and FLT1 is also driven low, indicating to the system that a fault has occurred. This is useful for disabling the external switch with low latency on critical events, such as over-current detection. When the comparator input, ALM1_CMP, exceeds the voltage reference, ALM1 signal is asserted low, but no action is taken by the driver. This may be useful as an alarm or warning indicator for over-temperature or over-voltage events.

The TPSI310xL-Q1 series offers a latch based fault indicator. When a fault is detected, the driver and the fault indicator are asserted low and remain latched, until EN is asserted low. The TPSI310x-Q1 series has a non-latched fault indicator. If the fault event is no longer present, FLT1 deasserts and the driver, after a specified recovery period, follows the state of the EN pin. If the fault event still remains, both the fault indicator and the driver remain asserted low.

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Documentación técnica

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Tipo Título Fecha
* Data sheet TPSI3100-Q1 Automotive Reinforced Isolated Switch Driver With 15-V Gate Supply and Dual Isolated Comparators datasheet PDF | HTML 18 dic 2023
Functional safety information TPSI3100-Q1, TPSI3100 Functional Safety FIT Rate, FMD, and Pin FMA (Rev. A) PDF | HTML 07 nov 2024
Application note Basics of Solid-State Relays PDF | HTML 24 jul 2024
EVM User's guide TPSI31xx-Q1 Evaluation Module User's Guide PDF | HTML 28 nov 2023

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Placa de evaluación

TPSI31XXQ1EVM — Módulo de evaluación TPSI31xx-Q1

El módulo de evaluación (EVM) TPSI31xx-Q1 es una placa de cuatro capas de cobre que contiene varios puntos de prueba y puentes para evaluar completamente la funcionalidad de la familia de dispositivos TPSI31xx-Q1, diseñada para la protección contra sobrecorriente con detección de dos niveles.
Guía del usuario: PDF | HTML
Herramienta de simulación

PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Diseños de referencia

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Este diseño de referencia implementa un circuito común en buses de CC de alta tensión (precarga) con componentes más nuevos, pequeños y rentables. Este diseño incorpora el controlador de interruptor aislado TPSI3100-Q1, que proporciona aislamiento reforzado entre dominios de tensión y no requiere (...)

Design guide: PDF
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UNKNOWN (DVX) 16 Ultra Librarian

Pedidos y calidad

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  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
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  • Monitoreo continuo de confiabilidad
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  • Lugar de fabricación
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