計算工具
FET-INRUSH-SOA-CALC — FET SOA margin calculator for dvdt based startup
The design calculator allows user to estimate the FET SOA margin while starting up with dVdt based startup for inrush current control
TPS1213-Q1
- AEC-Q100 automotive qualified for grade 1 temperature
- Device temperature grade 1: –40°C to +125°C ambient operating temperature range
- Functional Safety-Capable
- 3.5V to 40V input range (45V absolute maximum)
- Reverse input protection down to –40V
- Integrated 11V charge pump
- Low quiescent current, 35µA in low power mode (LPM = Low)
- Low 1µA (typ) shutdown current (EN/UVLO = Low)
- Strong gate drive (G1PU/G1PD: 1.69A src and 2A sink)
- Adjustable short-circuit protection (ISCP) with adjustable response time (TMR) and fault flag output (FLT)
- Fast transition from low power mode to active mode with WAKE indication
- 8µs switch over time from low power path to main path by external LPM trigger (low to high)
- Adjustable load wakeup threshold (ILWU) with (6µs) switchover from low power path to main path
- Fault indication (FLT) during short-circuit fault, charge pump undervoltage, and input undervoltage
- Adjustable input undervoltage lockout (UVLO)
- Short-circuit comparator diagnosis (SCP_TEST)
The TPS12130-Q1 is a 45V low IQ smart high side driver with protection and diagnostics. With wide operating voltage range of 3.5V–40V, the device is designed for 12V system designs. The device can withstand and protect the loads from negative supply voltages down to –40V.
TPS12130-Q1 has integrated two gate drives with 1.69A source and 2A sink capacity to drive MOSFETs in the main path and 165µA source and 2A sink capacity for the low power path.
In the low power mode with LPM = Low, the low power path FET is kept ON and the main FETs are turned OFF. The device consumes low IQ of 35µA (typ) in this mode. Auto load wakeup threshold to enter into active state can be adjusted using ISCP/LWU pin. IQ reduces to 1µA (typ) with EN/UVLO low.
The device provides adjustable short circuit protection using MOSFET VDS sensing or by using an external RSNS resistor. Auto-retry and latch-off fault behavior can be configured. The device also features diagnosis of the internal short circuit comparator using external control on SCP_TEST input.
The TPS12130-Q1 is available in a 19-pin VSSOP package.
技術文件
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檢視所有 3 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | TPS1213-Q1 45V Low IQ Automotive High Side Switch Controller With Low Power Mode and Adjustable Load Wakeup Trigger datasheet | PDF | HTML | 2024年 2月 28日 |
| EVM User's guide | TPS1213Q1EVM, TPS1213-Q1 Evaluation Module for Smart High-Side Driver User's Guide | PDF | HTML | 2023年 12月 1日 | |
| Certificate | TPS1213Q1EVM EU Declaration of Conformity (DoC) | 2023年 5月 22日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
開發板
TPS1213Q1EVM — TPS1213-Q1 評估模組
TPS1213Q1EVM 可對 TPS1213-Q1 智慧型高壓側驅動器進行參考電路評估。TPS1213-Q1 裝置具有 3.5V 至 40V 的操作電壓範圍和 1.69A 的主路徑閘極驅動強度，可在高電流設計中切換並聯 MOSFET。TPS12130-Q1 具有低功耗模式，能夠在消耗 28μA (典型值) 的情況下支援常開負載。在低功耗模式下，只有低功耗路徑 FET 保持導通，而主 FET 則關閉以節省 IQ。此裝置提供可調整的短路保護以及可設定的自動重試和閉鎖故障行為。
模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| VSSOP (DGX) | 19 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。