ADS5263
Convertidor analógico a digital (ADC) de cuatro canales, 16 bits y 100 MSPS
ADS5263
- Maximum Sample Rate: 100 MSPS
- Programmable Device Resolution
- Quad-Channel, 16-Bit, High-SNR Mode
- Quad-Channel, 14-Bit, Low-Power Mode
- 16-Bit High-SNR Mode
- 1.4 W Total Power at 100 MSPS
- 355 mW / Channel
- 4 Vpp Full-scale Input
- 85-dBFS SNR at fin = 3 MHz, 100 MSPS
- 1.4 W Total Power at 100 MSPS
- 14-Bit Low-Power Mode
- 785 mW Total Power at 100 MSPS
- 195 mW/Channel
- 2-Vpp Full-Scale Input
- 74-dBFS SNR at fin = 10 MHz
- Integrated Clamp (for interfacing to
CCD sensors)
- 785 mW Total Power at 100 MSPS
- Low-Frequency Noise Suppression
- Digital Processing Block
- Programmable FIR Decimation Filters
- Programmable Digital Gain: 0 dB to 12 dB
- 2- or 4-Channel Averaging
- Programmable Mapping Between ADC Input
Channels and LVDS Output Pins–Eases Board
Design - Variety of Test Patterns to Verify Data Capture by
FPGA/Receiver - Serialized LVDS Outputs
- Internal and External References
- 3.3-V Analog Supply
- 1.8-V Digital Supply
- Recovers From 6-dB Overload Within 1 Clock
Cycle - Package:
- 9-mm × 9-mm 64-Pin QFN
- Non-Magnetic Package Option for MRI
Systems
- CMOS Technology
Using CMOS process technology and innovative circuit techniques, the ADS5263 is designed to operate at low power and give very high SNR performance with a 4-Vpp full-scale input. Using a low-noise 16-bit front-end stage followed by a 14-bit ADC, the device gives 85-dBFS SNR up to 10 MHz and better than 80-dBFS SNR up to 30 MHz.
ADS5263 has a 14-bit low power mode, where it operates as a quad-channel 14-bit ADC. The 16-bit front-end stage is powered down and the part consumes almost half the power, compared to the 16-bit mode. The 14-bit mode supports a 2-Vpp full-scale input signal, with typical 74-dBFS SNR. The ADS5263 can be dynamically switched between the two resolution modes. This allows systems to use the same part in a high-resolution, high-power mode or a low-resolution, low-power mode.
The device also has a digital processing block that integrates several commonly used digital functions, such as digital gain (up to 12 dB). It includes a digital filter module that has built-in decimation filters (with low-pass, high-pass and band-pass characteristics). The decimation rate is also programmable (by 2, by 4, or by 8). This makes it very useful for narrow-band applications, where the filters can be used to improve SNR and knock-off harmonics, while at the same time reducing the output data rate.
The device includes an averaging mode where two channels (or even four channels) can be averaged to improve SNR. A very unique feature is the programmable mapper module that allows flexible mapping between the input channels and the LVDS output pins. This helps to greatly reduce the complexity of LVDS output routing and can potentially result in cheaper system boards by reducing the number of PCB layers. Specification of device is over industrial temperature range of 40°C to 85°C.
Documentación técnica
Tipo | Título | Fecha | ||
---|---|---|---|---|
* | Data sheet | ADS5263 Quad Channel 16-Bit, 100-MSPS High-SNR ADC datasheet (Rev. D) | PDF | HTML | 30 nov 2015 |
Application note | High Speed ADCs and Amplifiers for Flow Cytometry Applications | 12 oct 2020 | ||
Application note | Introduction to Magnetic Resonance Imaging (MRI) | 14 sep 2017 | ||
Application note | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 22 may 2015 | ||
EVM User's guide | ADS5263EVM Evaluation Module (Rev. A) | 05 mar 2015 | ||
Application note | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 19 jul 2013 | ||
Application note | Understanding Serial LVDS Capture in High-Speed ADCs | 10 jul 2013 | ||
More literature | TI and Altera Ease Design Process with Compatible Evaluation Tools | 25 abr 2011 | ||
More literature | TI and Xilinx Ease Design Process with Compatible Evaluation Tools | 25 abr 2011 | ||
Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 08 jun 2008 |
Diseño y desarrollo
Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.
ADS5263EVM — Módulo de evaluación ADS5263
El ADS5263 es un ADC de cuatro canales y 16 bits con una frecuencia de muestreo de hasta 100 MSPS que brinda una relación señal/ruido (SNR) de 84.6 dBFS con una entrada de 10 MHz. El módulo de evaluación (EVM) ADS5263 proporciona un entorno flexible para probar el ADS5263 bajo una variedad de (...)
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
Productos y hardware compatibles
Productos
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Receptores
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Servicios de troqueles y obleas
PSPICE-FOR-TI — PSpice® para herramienta de diseño y simulación de TI
Encapsulado | Pines | Símbolos CAD, huellas y modelos 3D |
---|---|---|
VQFN (RGC) | 64 | Ultra Librarian |
Pedidos y calidad
- RoHS
- REACH
- Marcado del dispositivo
- Acabado de plomo/material de la bola
- Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
- Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
- Contenido del material
- Resumen de calificaciones
- Monitoreo continuo de confiabilidad
- Lugar de fabricación
- Lugar de ensamblaje
Soporte y capacitación
Foros de TI E2E™ con asistencia técnica de los ingenieros de TI
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