ADS5424-SP

ACTIVO

ADC QMLV, 150 krad, cerámico, 14 bits, de canal único, 125 MSPS

Detalles del producto

Sample rate (max) (Msps) 105 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 570 Features High Performance Rating Space Peak-to-peak input voltage range (V) 2.2 Power consumption (typ) (mW) 1900 Architecture Pipeline SNR (dB) 72.4 ENOB (Bits) 11.7 SFDR (dB) 82.6 Operating temperature range (°C) -55 to 125 Input buffer No
Sample rate (max) (Msps) 105 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 570 Features High Performance Rating Space Peak-to-peak input voltage range (V) 2.2 Power consumption (typ) (mW) 1900 Architecture Pipeline SNR (dB) 72.4 ENOB (Bits) 11.7 SFDR (dB) 82.6 Operating temperature range (°C) -55 to 125 Input buffer No
CFP (HFG) 52 363.474225 mm² 19.065 x 19.065
  • 14-Bit Resolution
  • 105-MSPS Maximum Sample Rate
  • SNR = 70 dBc at 105 MSPS and 50 MHz IF
  • SFDR = 78 dBc at 105 MSPS and 50 MHz IF
  • 2.2-VPP Differential Input Range
  • 5-V Supply Operation
  • 3.3-V CMOS Compatible Outputs
  • 2.3-W Total Power Dissipation
  • 2s Complement Output Format
  • On-Chip Input Analog Buffer, Track and Hold, and Reference Circuit
  • 52-Pin Ceramic Nonconductive Tie-Bar Package (HFG)
  • Military Temperature Range
    ( –55°C to 125°C Tcase)
  • QML-V Qualified, SMD 5962-07206
  • Engineering Evaluation (/EM) Samples are Available(1)
  • APPLICATIONS
    • Single and Multichannel Digital Receivers
    • Base Station Infrastructure
    • Instrumentation
    • Video and Imaging
  • APPLICATIONS
    • Clocking: CDC7005
    • Amplifiers: OPA695, THS4509
  • (1) These units are intended for engineering evaluation only. They are processed to a non-compliant flow (e.g. No Burn-In, etc.) and are tested to a temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing or flight use. Parts are not warranted for performance over the full MIL specified temperature range of –55°C to 125°C or operating life.

    • 14-Bit Resolution
    • 105-MSPS Maximum Sample Rate
    • SNR = 70 dBc at 105 MSPS and 50 MHz IF
    • SFDR = 78 dBc at 105 MSPS and 50 MHz IF
    • 2.2-VPP Differential Input Range
    • 5-V Supply Operation
    • 3.3-V CMOS Compatible Outputs
    • 2.3-W Total Power Dissipation
    • 2s Complement Output Format
    • On-Chip Input Analog Buffer, Track and Hold, and Reference Circuit
    • 52-Pin Ceramic Nonconductive Tie-Bar Package (HFG)
    • Military Temperature Range
      ( –55°C to 125°C Tcase)
    • QML-V Qualified, SMD 5962-07206
    • Engineering Evaluation (/EM) Samples are Available(1)
    • APPLICATIONS
      • Single and Multichannel Digital Receivers
      • Base Station Infrastructure
      • Instrumentation
      • Video and Imaging
  • APPLICATIONS
    • Clocking: CDC7005
    • Amplifiers: OPA695, THS4509
  • (1) These units are intended for engineering evaluation only. They are processed to a non-compliant flow (e.g. No Burn-In, etc.) and are tested to a temperature rating of 25°C only. These units are not suitable for qualification, production, radiation testing or flight use. Parts are not warranted for performance over the full MIL specified temperature range of –55°C to 125°C or operating life.

    The ADS5424 is a 14-bit, 105-MSPS analog-to-digital converter (ADC) that operates from a 5-V supply, while providing 3.3-V CMOS compatible digital outputs. The ADS5424 input buffer isolates the internal switching of the on-chip track and hold (T&H) from disturbing the signal source. An internal reference generator is also provided to further simplify the system design. The ADS5424 has outstanding low noise and linearity, over input frequency. With only a 2.2-VPP input range, ADS5424 simplifies the design of multicarrier applications, where the carriers are selected on the digital domain.

    The ADS5424 is available in a 52-pin ceramic nonconductive tie-bar package (HFG). The ADS5424 is built on state of the art Texas Instruments complementary bipolar process (BiCom3) and is specified over full military temperature range (–55°C to 125°C Tcase)

    This CQFP package has built-in vias that electrically and thermally connect the bottom of the die to a pad on the bottom of the package. To efficiently remove heat and provide a low-impedance ground path, a thermal land is required on the surface of the PCB directly underneath the body of the package. During normal surface mount flow solder operations, the heat pad on the underside of the package is soldered to this thermal land creating an efficient thermal path. Normally, the PCB thermal land has a number of thermal vias within it that provide a thermal path to internal copper areas (or to the opposite side of the PCB) that provide for more efficient heat removal. TI typically recommends a 16-mm2 board-mount thermal pad. This allows maximum area for thermal dissipation, while keeping leads away from the pad area to prevent solder bridging. A sufficient quantity of thermal/electrical vias must be included to keep the device within recommended operating conditions. This pad must be electrically at ground potential.

    The ADS5424 is a 14-bit, 105-MSPS analog-to-digital converter (ADC) that operates from a 5-V supply, while providing 3.3-V CMOS compatible digital outputs. The ADS5424 input buffer isolates the internal switching of the on-chip track and hold (T&H) from disturbing the signal source. An internal reference generator is also provided to further simplify the system design. The ADS5424 has outstanding low noise and linearity, over input frequency. With only a 2.2-VPP input range, ADS5424 simplifies the design of multicarrier applications, where the carriers are selected on the digital domain.

    The ADS5424 is available in a 52-pin ceramic nonconductive tie-bar package (HFG). The ADS5424 is built on state of the art Texas Instruments complementary bipolar process (BiCom3) and is specified over full military temperature range (–55°C to 125°C Tcase)

    This CQFP package has built-in vias that electrically and thermally connect the bottom of the die to a pad on the bottom of the package. To efficiently remove heat and provide a low-impedance ground path, a thermal land is required on the surface of the PCB directly underneath the body of the package. During normal surface mount flow solder operations, the heat pad on the underside of the package is soldered to this thermal land creating an efficient thermal path. Normally, the PCB thermal land has a number of thermal vias within it that provide a thermal path to internal copper areas (or to the opposite side of the PCB) that provide for more efficient heat removal. TI typically recommends a 16-mm2 board-mount thermal pad. This allows maximum area for thermal dissipation, while keeping leads away from the pad area to prevent solder bridging. A sufficient quantity of thermal/electrical vias must be included to keep the device within recommended operating conditions. This pad must be electrically at ground potential.

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    Documentación técnica

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    Documentación principal Tipo Título Opciones de formato Fecha
    * Data sheet Class V, 14 Bit, 105 MSPS Analog-to-Digital Converter datasheet (Rev. D) 16 sep 2013
    * Radiation & reliability report ADS5424-SP Radiation Report 05 dic 2016
    * SMD ADS5424-SP SMD 5962-07206 08 jul 2016
    * Radiation & reliability report ADS5424 SEE Report 26 mar 2015
    Application brief DLA Approved Optimizations for QML Products (Rev. C) PDF | HTML 17 jun 2025
    Application note Heavy Ion Orbital Environment Single-Event Effects Estimations (Rev. B) PDF | HTML 10 jun 2025
    Selection guide TI Space Products (Rev. K) 04 abr 2025
    More literature TI Engineering Evaluation Units vs. MIL-PRF-38535 QML Class V Processing (Rev. B) 20 feb 2025
    Application note Single-Event Effects Confidence Interval Calculations (Rev. A) PDF | HTML 19 oct 2022
    Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 sep 2010
    Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 abr 2009
    Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 jun 2008
    Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 jun 2008

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