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High-speed ADCs (≥10 MSPS)

ADS5542

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14-Bit, 80-MSPS Analog-to-Digital Converter (ADC)

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Data sheet

ADS5542

ACTIVE
Data sheet Order now

Product details

Sample rate (max) (Msps) 80 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2.3 Power consumption (typ) (mW) 674 Architecture Pipeline SNR (dB) 74.3 ENOB (bit) 11.9 SFDR (dB) 92 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 80 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel CMOS Analog input BW (MHz) 750 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2.3 Power consumption (typ) (mW) 674 Architecture Pipeline SNR (dB) 74.3 ENOB (bit) 11.9 SFDR (dB) 92 Operating temperature range (°C) -40 to 85 Input buffer No
HTQFP (PAP) 64 144 mm² 12 x 12
  • 14-Bit Resolution
  • 80 MSPS Sample Rate
  • High SNR: 72.9 dBFS at 100 MHz fIN
  • High SFDR: 88 dBc at 100 MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 545 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Amplifiers: OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments
  • 14-Bit Resolution
  • 80 MSPS Sample Rate
  • High SNR: 72.9 dBFS at 100 MHz fIN
  • High SFDR: 88 dBc at 100 MHz fIN
  • 2.3-VPP Differential Input Voltage
  • Internal Voltage Reference
  • 3.3-V Single-Supply Voltage
  • Analog Power Dissipation: 545 mW
  • Serial Programming Interface
  • TQFP-64 PowerPAD™ Package
  • Recommended Amplifiers: OPA695, OPA847, THS3201, THS3202, THS4503, THS4509, THS9001
  • APPLICATIONS
    • Wireless Communication
      • Communication Receivers
      • Base Station Infrastructure
    • Test and Measurement Instrumentation
    • Single and Multichannel Digital Receivers
    • Communication Instrumentation
      • Radar, Infrared
    • Video and Imaging
    • Medical Equipment

PowerPAD is a trademark of Texas Instruments

The ADS5542 is a high-performance, 14-bit, 80 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5542 has excellent power consumption of 545 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5542 is available in a 64-pin TQFP PowerPAD package over the industrial temperature range -40°C to 85°C.

The ADS5542 is a high-performance, 14-bit, 80 MSPS analog-to-digital converter (ADC). To provide a complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for applications demanding the highest speed and highest dynamic performance in little space, the ADS5542 has excellent power consumption of 545 mW at 3.3-V single-supply voltage. This allows an even higher system integration density. The provided internal reference simplifies system design requirements. Parallel CMOS-compatible output ensures seamless interfacing with common logic.

The ADS5542 is available in a 64-pin TQFP PowerPAD package over the industrial temperature range -40°C to 85°C.
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Technical documentation

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Type Title Date
* Data sheet 14-Bit, 80 MSPS Analog-to-Digital Converter datasheet (Rev. D) 08 Feb 2007
White paper Understanding Functional Safety FIT Base Failure Rate Estimates per IEC 62380 and SN 29500 (Rev. A) PDF | HTML 30 Apr 2024
Application note Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 22 May 2015
Application note Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 19 Jul 2013
Application note Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 10 Sep 2010
Application note Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 28 Apr 2009
Application note CDCE62005 as Clock Solution for High-Speed ADCs 04 Sep 2008
Application note CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 08 Jun 2008
Application note Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 02 Jun 2008
User guide ADS5500/5541/5542/5520/5521/5522 14-&12-Bit Single Channel ADC w/LVDT1422 Output 26 Jul 2006
Analog Design Journal Clocking High-Speed Data Converters 18 Jan 2005

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