Product details

Resolution (Bits) 32 Sample rate (max) (ksps) 4 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 2.5 Input voltage range (min) (V) -2.5 Features GPIO, PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 8 Analog supply (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 134 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
Resolution (Bits) 32 Sample rate (max) (ksps) 4 Number of input channels 2 Interface type SPI Architecture Delta-Sigma Input type Differential Multichannel configuration Multiplexed Rating Catalog Reference mode External Input voltage range (max) (V) 2.5 Input voltage range (min) (V) -2.5 Features GPIO, PGA Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 8 Analog supply (min) (V) 3 Analog supply voltage (max) (V) 5.5 SNR (dB) 134 Digital supply (min) (V) 1.65 Digital supply (max) (V) 3.6
VQFN (RHB) 32 25 mm² 5 x 5
  • Selectable resolution-power modes:
    • Dynamic range: 134 dB at 2 ms, 11.5 mW
    • Dynamic range: 129 dB at 2 ms, 4.8 mW
  • Flexible digital filter:
    • Selectable sinc + FIR + IIR
    • Linear or minimum phase
    • High-pass filter
  • THD: < –120 dB
  • CMRR: 125 dB
  • Data rates: 125 SPS to 4000 SPS
  • Programmable gains: 1 to 64
  • PGA bypass option
  • SYNC input
  • Clock error compensation
  • Two-channel multiplexer
  • Offset and gain calibration
  • General-purpose digital I/Os
  • Analog supply operation: 5 V, 3.3 V, or ±2.5 V
  • Reference voltage options: 5 V, 4.096 V, or 2.5 V
  • Selectable resolution-power modes:
    • Dynamic range: 134 dB at 2 ms, 11.5 mW
    • Dynamic range: 129 dB at 2 ms, 4.8 mW
  • Flexible digital filter:
    • Selectable sinc + FIR + IIR
    • Linear or minimum phase
    • High-pass filter
  • THD: < –120 dB
  • CMRR: 125 dB
  • Data rates: 125 SPS to 4000 SPS
  • Programmable gains: 1 to 64
  • PGA bypass option
  • SYNC input
  • Clock error compensation
  • Two-channel multiplexer
  • Offset and gain calibration
  • General-purpose digital I/Os
  • Analog supply operation: 5 V, 3.3 V, or ±2.5 V
  • Reference voltage options: 5 V, 4.096 V, or 2.5 V

The ADS1285 is a 32-bit, low-power, analog-to-digital converter (ADC), with a programmable gain amplifier (PGA) and a finite impulse response (FIR) filter. The ADC is designed for the demanding needs of seismology equipment requiring low-noise precision digitization and extended battery run time.

The low-noise PGA allows direct connection of geophones and transformer-coupled hydrophones without the need of an external amplifier.

The ADC incorporates a high-resolution, delta-sigma (ΔΣ) modulator and a FIR filter with programmable phase response. The high-pass filter removes dc and low-frequency content from the signal. Clock frequency error is compensated by the sample rate converter with 7-ppb resolution.

Choice of power modes optimize dynamic range verses power consumption. Power consumption is further reduced by PGA bypass operation.

The ADC is available in a compact 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +85°C ambient temperature range.

The ADS1285 is a 32-bit, low-power, analog-to-digital converter (ADC), with a programmable gain amplifier (PGA) and a finite impulse response (FIR) filter. The ADC is designed for the demanding needs of seismology equipment requiring low-noise precision digitization and extended battery run time.

The low-noise PGA allows direct connection of geophones and transformer-coupled hydrophones without the need of an external amplifier.

The ADC incorporates a high-resolution, delta-sigma (ΔΣ) modulator and a FIR filter with programmable phase response. The high-pass filter removes dc and low-frequency content from the signal. Clock frequency error is compensated by the sample rate converter with 7-ppb resolution.

Choice of power modes optimize dynamic range verses power consumption. Power consumption is further reduced by PGA bypass operation.

The ADC is available in a compact 5-mm × 5-mm VQFN package and is fully specified over the –40°C to +85°C ambient temperature range.

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* Data sheet ADS1285 32-Bit, Delta-Sigma ADC for Seismic Applications datasheet (Rev. A) PDF | HTML 12 Dec 2022
Application note Digital Filter Types in Delta-Sigma ADCs (Rev. A) PDF | HTML 29 Mar 2023

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