Product details

Resolution (Bits) 18 Sample rate (max) (ksps) 2000 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 15 Analog supply (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 100 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
Resolution (Bits) 18 Sample rate (max) (ksps) 2000 Number of input channels 1 Interface type Enhanced SPI, SPI Architecture SAR Input type Differential Rating Catalog Reference mode External Input voltage range (max) (V) 5 Input voltage range (min) (V) 0 Features Daisy-Chainable, Oscillator Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 15 Analog supply (min) (V) 1.65 Analog supply voltage (max) (V) 1.95 SNR (dB) 100 Digital supply (min) (V) 1.65 Digital supply (max) (V) 1.95
VQFN (RGE) 24 16 mm² 4 x 4
  • Sample Rate: 2 MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.5 LSB
    • DNL: ±0.75 LSB
    • SNR: 100 dB, THD: –118 dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5 V to 5 V,
      Independent of AVDD
  • Low-Power Dissipation:
    • 9 mW at 2 MSPS (AVDD Only)
    • 15 mW at 2 MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI (multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8-V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN
  • Sample Rate: 2 MSPS
  • No Latency Output
  • Excellent DC and AC Performance:
    • INL: ±0.5 LSB
    • DNL: ±0.75 LSB
    • SNR: 100 dB, THD: –118 dB
  • Wide Input Range:
    • Unipolar Differential Input Range: ±VREF
    • VREF Input Range: 2.5 V to 5 V,
      Independent of AVDD
  • Low-Power Dissipation:
    • 9 mW at 2 MSPS (AVDD Only)
    • 15 mW at 2 MSPS (Total)
    • Flexible Low-Power Modes Enable Power Scaling with Throughput
  • Enhanced-SPI (multiSPI™) Digital Interface
  • JESD8-7A-Compliant Digital I/O at 1.8-V DVDD
  • Fully-Specified Over Extended Temperature Range: –40°C to +125°C
  • Small Footprint: 4-mm × 4-mm VQFN

The ADS9110 is an 18-bit, 2-MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9120 is a pin-compatible, 16-bit, 2.5-MSPS variant of the ADS9110.

The ADS9110 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9110 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9110 is compatible with a standard SPI Interface. The ADS9110 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4-mm × 4-mm, VQFN package.

The ADS9110 is an 18-bit, 2-MSPS, successive approximation register (SAR) analog-to-digital converter (ADC) with enhanced performance features. The high throughput enables developers to oversample the input signal to improve dynamic range and accuracy of the measurement. The ADS9120 is a pin-compatible, 16-bit, 2.5-MSPS variant of the ADS9110.

The ADS9110 boosts analog performance while maintaining high-resolution data transfer by using TI’s enhanced SPI feature. Enhanced SPI enables the ADS9110 to achieve high throughput at lower clock speeds, thereby simplifying board layout and lowering system cost.

Enhanced SPI also simplifies the host clocking-in of data, thereby making the device ideal for applications involving FPGAs and DSPs. The ADS9110 is compatible with a standard SPI Interface. The ADS9110 has an internal data parity feature that can be appended to the ADC data output. ADC data validation by the host, using parity bits, improves system reliability.

The device supports JESD8-7A compliant I/Os, the extended industrial temperature range, and is offered in a space-saving, 4-mm × 4-mm, VQFN package.

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Technical documentation

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Type Title Date
* Data sheet ADS9110 18-Bit, 2-MSPS, 15-mW, SAR ADC With Enhanced Performance Features datasheet (Rev. B) PDF | HTML 29 Jun 2017
Application brief Understanding and Using SAR ADC SPICE Micromodel PDF | HTML 23 Nov 2021
Application brief Maximizing System Total Harmonic Distortion Using High Speed Amplifiers 20 Jun 2018
Application note Attenuator Amplifier Design to Maximize the Input Voltage of Differential ADCs 14 Jun 2018
Application brief Improving Input Settling for Precision Data Converters 12 Dec 2017
Application brief Optimizing Data Transfer on High-Resolution, High-Throughput Data Converters 12 Dec 2017
Application brief Simplify Isolation Designs Using an Enhanced-SPI ADC Interface 11 Dec 2017
Application note Improving Resolution of SAR ADC 14 Jun 2017
White paper Enabling Faster, Smarter, and More Robust Solutions for SAR ADSx With multiSPI 08 Nov 2016
White paper Voltage-reference impact on total harmonic distortion 01 Aug 2016
EVM User's guide ADS9110EVM-PDK User's Guide 07 Oct 2015

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