ADS6445-EP
- Maximum Sample Rate: 125 MSPS
- 14-Bit Resolution with No Missing Codes
- Simultaneous Sample and Hold
- 3.5-dB Coarse Gain and up to 6-dB Programmable
Fine Gain for SFDR/SNR Trade-Off - Serialized LVDS Outputs with Programmable
Internal Termination Option - Supports Sine, LVCMOS, LVPECL, LVDS Clock
Inputs and Amplitude Down to 400 mVPP - Internal Reference with External Reference Support
- No External Decoupling Required for References
- 3.3-V Analog and Digital Supply
- 64-pin QFN Package (9 mm × 9 mm)
- Feature Compatible Dual Channel Family
The ADS6445/ADS6444 is a high performance 14 bit 125/105 MSPS quad channel A-D converter. Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 64-pin QFN package (9 mm × 9 mm) that allows for high system integration density. The device includes 3.5 dB coarse gain option that can be used to improve SFDR performance with little degradation in SNR. In addition to the coarse gain, fine gain options also exist, programmable in 1 dB steps up to 6 dB.
The output interface is 2-wire, where each ADC data is serialized and output over two LVDS pairs. This makes it possible to halve the serial data rate (compared to a 1-wire interface) and restrict it to less than 1 Gbps easing receiver design. The ADS644X also includes the traditional 1-wire interface that can be used at lower sampling frequencies.
An internal phase lock loop (PLL) multiplies the incoming ADC sampling clock to derive the bit clock. The bit clock is used to serialize the 14 bit data from each channel. In addition to the serial data streams, the frame and bit clocks also are transmitted as LVDS outputs.
The LVDS output buffers have features such as programmable LVDS currents, current doubling modes and internal termination options. These can be used to widen eye openings and improve signal integrity, easing capture by the receiver.
The ADC channel outputs can be transmitted either as MSB or LSB first and 2s complement or straight binary.
The ADS644X has internal references, but also can support an external reference mode. The device is specified over –55°C to 125°C operating junction temperature range.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | QUAD CHANNEL, 14 BIT, 125/105 MSPS ADC WITH SERIAL LVDS OUTPUTS datasheet (Rev. C) | 2013/05/29 | |
* | Radiation & reliability report | ADS6445MRGCTEP Reliability Report | 2014/12/22 | |
Application note | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010/09/10 | ||
Application note | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009/04/28 | ||
Application note | CDCE62005 as Clock Solution for High-Speed ADCs | 2008/09/04 | ||
Application note | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008/06/08 | ||
Application note | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008/06/02 | ||
Application note | QFN Layout Guidelines | 2006/07/28 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
지원되는 제품 및 하드웨어
제품
정밀 연산 증폭기(Vos<1mV)
범용 연산 증폭기
오디오 연산 증폭기
트랜스임피던스 증폭기
고속 연산 증폭기(GBW ≥ 50MHz)
전력 연산 증폭기
비디오 증폭기
라인 드라이버
트랜스컨덕턴스 증폭기 및 레이저 드라이버
완전 차동 증폭기
정밀 ADC
바이오센싱 AFE
고속 ADC(≥10 MSPS)
터치스크린 컨트롤러
차동 증폭기
계측 증폭기
오디오 라인 리시버
아날로그 전류 감지 증폭기
디지털 전원 모니터
션트 레지스터 통합 아날로그 전류 감지 증폭기
션트 레지스터가 통합된 디지털 전원 모니터
다이 및 웨이퍼 서비스
RF 리시버
RF 트랜시버
RF 트랜스미터
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
VQFN (RGC) | 64 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치