ADS1602
- High Speed:
- Data Rate: 2.5MSPS
- Bandwidth: 1.23MHz
- Outstanding Performance:
- SNR: 91dB at fIN = 100kHz, –1dBFS
- THD: –101dB at fIN = 100kHz, –6dBFS
- SFDR: 103dB at fIN = 100kHz, –6dBFS
- Ease-of-Use:
- High-Speed 3-Wire Serial Interface
- Directly Connects to TMS320 DSPs
- On-Chip Digital Filter Simplifies Antialias Requirements
- Simple Pin-Driven Control—No On-Chip Registers to Program
- Selectable On-Chip Voltage Reference
- Simultaneous Sampling with Multiple ADS1602s
- Low Power:
- 530mW at 2.5MSPS
- Power-Down Mode
The ADS1602 is a high-speed, high-precision, delta-sigma (ΔΣ) analog-to-digital converter (ADC) manufactured on an advanced CMOS process. The ADS1602 oversampling topology reduces clock jitter sensitivity during the sampling of high-frequency, large amplitude signals by a factor of four over that achieved by Nyquist-rate ADCs. Consequently, signal-to-noise ratio (SNR) is particularly improved. Total harmonic distortion (THD) is –101dB, and the spurious-free dynamic range (SFDR) is 103dB.
Optimized for power and performance, the ADS1602 dissipates only 530mW while providing a full-scale differential input range of ±3V. Having such a wide input range makes out-of-range signals unlikely. The OTR pin indicates if an analog input out-of-range condition does occur. The differential input signal is measured against the differential reference, which can be generated internally or supplied externally on the ADS1602.
The ADS1602 uses an inherently stable advanced modulator with an on-chip decimation filter. The filter stop band extends to 38.6MHz, which greatly simplifies the antialiasing circuitry. The modulator samples the input signal up to 40MSPS, depending on fCLK, while the 16x decimation filter uses a series of four half-band FIR filter stages to provide 75dB of stop band attenuation and 0.001dB of passband ripple.
Output data is provided over a simple 3-wire serial interface at rates up to 2.5MSPS, with a –3dB bandwidth of 1.23MHz. The output data or its complementary format directly connects to DSPs such as TI’s TMS320 family, FPGAs, or ASICs. A dedicated synchronization pin enables simultaneous sampling with multiple ADS1602s in multi-channel systems. Power dissipation is set by an external resistor that allows a reduction in dissipation when operating at slower speeds. All of the ADS1602 features are controlled by dedicated I/O pins, which simplify operation by eliminating the need for on-chip registers.
The high performing, easy-to-use ADS1602 is especially suitable for demanding measurement applications in sonar, vibration analysis, and data acquisition. The ADS1602 is offered in a small, 7mm × 7mm TQFP-48 package and is specified from –40°C to +85°C.
기술 자료
유형 | 직함 | 날짜 | ||
---|---|---|---|---|
* | Data sheet | 16-Bit, 2.5MSPS Analog-to-Digital Converter datasheet (Rev. E) | 2011/10/20 | |
Application note | Digital Filter Types in Delta-Sigma ADCs (Rev. A) | PDF | HTML | 2023/03/29 | |
Application note | ADS16xx Reference Options (Rev. A) | PDF | HTML | 2022/03/09 | |
E-book | Fundamentals of Precision ADC Noise Analysis | 2020/06/19 | ||
White paper | Voltage-reference impact on total harmonic distortion | 2016/08/01 | ||
E-book | Best of Baker's Best: Precision Data Converters -- Delta-Sigma ADCs | 2015/03/19 |
설계 및 개발
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ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
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제품
정밀 연산 증폭기(Vos<1mV)
범용 연산 증폭기
오디오 연산 증폭기
트랜스임피던스 증폭기
고속 연산 증폭기(GBW ≥ 50MHz)
전력 연산 증폭기
비디오 증폭기
라인 드라이버
트랜스컨덕턴스 증폭기 및 레이저 드라이버
완전 차동 증폭기
정밀 ADC
바이오센싱 AFE
고속 ADC(≥10 MSPS)
리시버
터치스크린 컨트롤러
차동 증폭기
계측 증폭기
오디오 라인 리시버
아날로그 전류 감지 증폭기
디지털 전원 모니터
션트 레지스터 통합 아날로그 전류 감지 증폭기
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TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
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패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
---|---|---|
TQFP (PFB) | 48 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
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